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AS7C33512PFS16A-133BC PDF预览

AS7C33512PFS16A-133BC

更新时间： 2024-01-16 17:01:56
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器内存集成电路
页数 文件大小 规格书
14页 370K
描述
Standard SRAM, 512KX16, 10ns, CMOS, PBGA119, 14 X 20 MM, BGA-119

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AS7C33512PFS16A-133BC 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：BGA
包装说明：LBGA,针数：119
Reach Compliance Code：compliantECCN代码：3A991.B.2.A
HTS代码：8542.32.00.41风险等级：5.64
最长访问时间：10 ns其他特性：FLOW-THROUGH OR PIPELINED ARCHITECTURE
JESD-30 代码：R-PBGA-B119JESD-609代码：e0
长度：22 mm内存密度：8388608 bit
内存集成电路类型：STANDARD SRAM内存宽度：16
功能数量：1端子数量：119
字数：524288 words字数代码：512000
工作模式：SYNCHRONOUS最高工作温度：70 °C
最低工作温度：组织：512KX16
封装主体材料：PLASTIC/EPOXY封装代码：LBGA
封装形状：RECTANGULAR封装形式：GRID ARRAY, LOW PROFILE
并行/串行：PARALLEL峰值回流温度（摄氏度）：NOT SPECIFIED
认证状态：Not Qualified座面最大高度：1.7 mm
最大供电电压 (Vsup)：3.465 V最小供电电压 (Vsup)：3.135 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：TIN LEAD端子形式：BALL
端子节距：1.27 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：14 mm
Base Number Matches：1

AS7C33512PFS16A-133BC 数据手册

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AS7C33512PFS16A  
AS7C33512PFS18A  
®
Signal descriptions  
Signal  
I/O  
Properties  
CLOCK  
SYNC  
Description  
CLK  
I
I
Clock. All inputs except OE, FT, ZZ, LBO are synchronous to this clock.  
Address. Sampled when all chip enables are active and ADSC or ADSP are asserted.  
Data. Driven as output when the chip is enabled and OE is active.  
A0–A18  
DQ[a,b]  
I/O  
SYNC  
Master chip enable. Sampled on clock edges when ADSP or ADSC is active. When  
CE0 is inactive, ADSP is blocked. Refer to the Synchronous Truth Table for more  
information.  
CE0  
I
SYNC  
Synchronous chip enables. Active HIGH and active LOW, respectively. Sampled on  
clock edges when ADSC is active or when CE0 and ADSP are active.  
CE1, CE2  
ADSP  
I
I
SYNC  
SYNC  
Address strobe (processor). Asserted LOW to load a new address or to enter standby  
mode.  
Address strobe (controller). Asserted LOW to load a new address or to enter standby  
mode.  
ADSC  
ADV  
I
I
I
SYNC  
SYNC  
SYNC  
Burst advance. Asserted LOW to continue burst read/write.  
Global write enable. Asserted LOW to write all 16/18 bits. When HIGH, BWE and  
BW[a,b] control write enable.  
GWE  
Byte write enable. Asserted LOW with GWE = HIGH to enable effect of BW[a,b]  
inputs.  
BWE  
BW[a,b]  
OE  
I
I
I
I
SYNC  
SYNC  
Write enables. Used to control write of individual bytes when GWE = HIGH and  
BWE = LOW. If any of BW[a,b] is active with GWE = HIGH and BWE = LOW the  
cycle is a write cycle. If all BW[a,b] are inactive, the cycle is a read cycle.  
Asynchronous output enable. I/O pins are driven when OE is active and the chip is  
in read mode.  
ASYNC  
STATIC  
Count mode. When driven HIGH, count sequence follows Intel XOR convention.  
When driven LOW, count sequence follows linear convention. This signal is  
internally pulled HIGH.  
LBO  
Flow-through mode.When LOW, enables single register flow-through mode.  
Connect to VDD if unused or for pipelined operation.  
FT  
I
I
STATIC  
ASYNC  
Snooze. Places device in low power mode; data is retained. Connect to GND if  
unused.  
ZZ  
Absolute maximum ratings  
Parameter  
Symbol  
VDD, VDDQ  
VIN  
Min  
–0.5  
–0.5  
–0.5  
–
Max  
+4.6  
Unit  
V
Power supply voltage relative to GND  
Input voltage relative to GND (input pins)  
Input voltage relative to GND (I/O pins)  
Power dissipation  
VDD + 0.5  
VDDQ + 0.5  
1.8  
V
VIN  
V
PD  
W
mA  
°C  
°C  
DC output current  
IOUT  
–
50  
Storage temperature (plastic)  
Temperature under bias  
Tstg  
–65  
–65  
+150  
Tbias  
+135  
Note: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional opera-  
tion of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute  
maximum rating conditions may affect reliability.  
4/15/02; v.1.5  
Alliance Semiconductor  
5 of 14  
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与AS7C33512PFS16A-133BC相关器件

型号 品牌 描述 获取价格 数据表
AS7C33512PFS16A-133BI ISSI Standard SRAM, 512KX16, 10ns, CMOS, PBGA119, 14 X 20 MM, BGA-119

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AS7C33512PFS16A-133TQC ISSI Standard SRAM, 512KX16, 10ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100

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AS7C33512PFS16A-133TQI ISSI Standard SRAM, 512KX16, 10ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100

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AS7C33512PFS16A-150BC ISSI Standard SRAM, 512KX16, 10ns, CMOS, PBGA119, 14 X 20 MM, BGA-119

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AS7C33512PFS16A-150BI ISSI Standard SRAM, 512KX16, 10ns, CMOS, PBGA119, 14 X 20 MM, BGA-119

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AS7C33512PFS16A-150TQC ISSI Standard SRAM, 512KX16, 10ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100

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