Datasheet > AS7C33512PFD18A2-100TQC

AS7C33512PFD18A2-100TQC

更新时间： 2024-11-25 03:23:35

品牌	Logo	应用领域
美国芯成 - ISSI		静态存储器
页数	文件大小	规格书
14页	370K
描述
Standard SRAM, 512KX18, 5ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100

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中文翻译

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数据手册

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April 2002

Preliminary

AS7C33512PFD16A

AS7C33512PFD18A

3.3V 512K × 16/18 pipeline burst synchronous SRAM

Features

• Asynchronous output enable control

• Available in 100-pin TQFP and 119-pin BGA package

• Byte write enables

• Multiple chip enables for easy expansion

• 3.3V core power supply

• 2.5V or 3.3V I/O operation with separate V

• Organization: 524,288 words × 16 or 18 bits

• Fast clock speeds to 166 MHz in LVTTL/LVCMOS

• Fast clock to data access: 3.5/3.8/4.0/5.0 ns

• Fast OE access time: 3.5/3.8/4.0/5.0 ns

• Fully synchronous register-to-register operation

• Single register “Flow-through” option

• Dual-cycle deselect

DDQ

• 30 mW typical standby power in power down mode

• NTD™ pipeline architecture available

- Single-cycle deselect also available (AS7C33512PFS16A/

AS7C33512PFS18A)

(AS7C33512NTD16A/AS7C33512NTD18A)

• Available in both 2 chip enable and 3 chip enable

- 2 CE part number is AS7C33512PFD16A or AS7C33512PFD18A2

• Pentium® compatible architecture and timing

1. Pentium is a registered trademark of Intel Corporation. NTD™ is a

trademark of Alliance Semiconductor Corporation. All trademarks men-

tioned in this document are the property of their respective owners.

Logic block diagram

LBO

CLK

ADV

CLK

CLR

Burst logic

19 17

512K × 16/18

Memory

ADSC

ADSP

Address^Q

array

A[18:0]

CLK

16/18

GWE

DQb

Byte Write

registers

BWE

CLK

DQa

Byte Write

registers

CLK

CE0

CE1

CE2

Enable ^Q

Input

registers

Output

registers

CLK

Enable ^Q

delay

Power

down

CLK

16/18

DQ[a,b]

Selection guide

–166

–150

–133

–100

Units

Minimum cycle time

6.6

150

3.8

450

110

7.5

Maximum pipelined clock frequency

Maximum pipelined clock access time

Maximum operating current

166.7

3.5

133.3

100

MHz

475

130

425

100

325

Maximum standby current

Maximum CMOS standby current (DC)

4/15/02; 4 v.1.5

Alliance Semiconductor

1 of 14

12 3 4 5 6 7...14

中文翻译

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与AS7C33512PFD18A2-100TQC相关器件

型号	品牌	获取价格	描述	数据表
AS7C33512PFD18A2-100TQI	ISSI	获取价格	Standard SRAM, 512KX18, 5ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100
AS7C33512PFD18A2-133BC	ISSI	获取价格	Standard SRAM, 512KX18, 4.5ns, CMOS, PBGA119, 14 X 20 MM, BGA-119
AS7C33512PFD18A2-133BI	ISSI	获取价格	Standard SRAM, 512KX18, 4.5ns, CMOS, PBGA119, 14 X 20 MM, BGA-119
AS7C33512PFD18A2-133TQC	ISSI	获取价格	Standard SRAM, 512KX18, 4.5ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100
AS7C33512PFD18A2-133TQI	ISSI	获取价格	Standard SRAM, 512KX18, 4.5ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100
AS7C33512PFD18A2-150BC	ISSI	获取价格	Standard SRAM, 512KX18, 4.3ns, CMOS, PBGA119, 14 X 20 MM, BGA-119
AS7C33512PFD18A2-150BI	ISSI	获取价格	Standard SRAM, 512KX18, 4.3ns, CMOS, PBGA119, 14 X 20 MM, BGA-119
AS7C33512PFD18A2-150TQC	ISSI	获取价格	Standard SRAM, 512KX18, 4.3ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100
AS7C33512PFD18A2-150TQI	ISSI	获取价格	Standard SRAM, 512KX18, 4.3ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100
AS7C33512PFD18A2-166BC	ISSI	获取价格	Standard SRAM, 512KX18, 4ns, CMOS, PBGA119, 14 X 20 MM, BGA-119

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