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AS7C33256PFD36A-133BC PDF预览

AS7C33256PFD36A-133BC

更新时间： 2024-10-29 03:18:39
品牌 Logo 应用领域
ALSC 静态存储器
页数 文件大小 规格书
14页 584K
描述
Standard SRAM, 256KX36, 10ns, CMOS, PBGA119, 14 X 20 MM, BGA-119

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AS7C33256PFD36A-133BC 数据手册

 浏览型号AS7C33256PFD36A-133BC的Datasheet PDF文件第3页浏览型号AS7C33256PFD36A-133BC的Datasheet PDF文件第4页浏览型号AS7C33256PFD36A-133BC的Datasheet PDF文件第5页浏览型号AS7C33256PFD36A-133BC的Datasheet PDF文件第7页浏览型号AS7C33256PFD36A-133BC的Datasheet PDF文件第8页浏览型号AS7C33256PFD36A-133BC的Datasheet PDF文件第9页 
AS7C33256PFD32A  
AS7C33256PFD36A  
®
Synchronous truth table  
1
CE0  
H
L
CE1  
X
L
CE2 ADSP ADSC ADV WEn  
OE Address accessed  
CLK  
Operation  
Deselect  
DQ  
Hi−Z  
Hi−Z  
Hi−Z  
Hi−Z  
Hi−Z  
Hi−Z2  
Hi−Z  
Hi−Z2  
Hi−Z  
Q
X
X
X
H
H
L
X
L
L
X
L
X
X
X
X
X
X
X
X
X
L
X
X
X
X
X
X
X
F
X
X
X
X
X
L
NA  
NA  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
L to H  
Deselect  
L
L
H
L
NA  
Deselect  
L
X
X
H
H
H
H
X
X
X
X
X
X
X
X
H
X
X
X
X
X
L
NA  
Deselect  
L
H
L
NA  
Deselect  
L
X
X
L
External  
External  
External  
External  
Next  
Begin read  
Begin read  
Begin read  
Begin read  
Cont. read  
Cont. read  
Suspend read  
Suspend read  
Cont. read  
Cont. read  
Suspend read  
Suspend read  
Begin write  
Cont. write  
Cont. write  
Suspend write  
Suspend write  
L
L
L
H
L
L
L
H
H
H
H
H
H
X
X
X
X
H
H
X
H
X
L
L
L
F
H
L
X
X
X
X
H
H
H
H
L
X
X
X
X
X
X
X
X
L
H
H
H
H
H
H
H
H
L
F
L
F
H
L
Next  
Hi−Z  
Q
H
H
L
F
Current  
Current  
Next  
F
H
L
Hi−Z  
Q
F
L
F
H
L
Next  
Hi−Z  
Q
H
H
X
L
F
Current  
Current  
External  
Next  
F
H
X
X
X
X
X
Hi−Z  
D3  
T
T
T
T
T
X
H
X
H
X
X
X
X
H
H
H
H
D
L
Next  
D
H
H
Current  
Current  
D
D
1 See “Write enable truth table”on page 4 for more information.  
2 Q in “flow through” mode  
3 For WRITE operation following a READ, OE must be HIGH before the input data set up time and held HIGH throughout the input hold time.  
Key: X = Don’t Care, L = Low, H = High.  
Recommended operating conditions  
Parameter  
Symbol  
VDD  
VSS  
Min  
3.135  
0.0  
Nominal  
Max  
3.465  
0.0  
Unit  
3.3  
0.0  
3.3  
0.0  
2.5  
0.0  
–
Supply voltage  
V
VDDQ  
VSSQ  
VDDQ  
VSSQ  
VIH  
3.135  
0.0  
3.465  
0.0  
3.3V I/O supply  
voltage  
V
V
V
2.35  
0.0  
2.9  
2.5V I/O supply  
voltage  
0.0  
2.0  
–0.52  
VDD + 0.3  
0.8  
Address and  
control pins  
VIL  
–
Input voltages1  
VIH  
2.0  
–
VDDQ + 0.3  
0.8  
I/O pins  
V
VIL  
–0.52  
0
–
Ambient operating temperature  
TA  
–
70  
°C  
1 Input voltage ranges apply to 3.3V I/O operation. For 2.5V I/O operation, contact factory for input specifications.  
2 V min = –2.0V for pulse width less than 0.2 × t  
.
IL  
RC  
4/15/02; v.1.8  
Alliance Semiconductor  
P. 6 of 14  
1...3456789...14

中文翻译

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与AS7C33256PFD36A-133BC相关器件

型号 品牌 获取价格 描述 数据表
AS7C33256PFD36A-133BI ALSC

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 		Standard SRAM, 256KX36, 10ns, CMOS, PBGA119, 14 X 20 MM, BGA-119
AS7C33256PFD36A-133TQC ISSI

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 		Standard SRAM, 256KX36, 4ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100
AS7C33256PFD36A-133TQC ALSC

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 		3.3V 256K x 32/36 pipelined burst synchronous SRAM
AS7C33256PFD36A-133TQCN ALSC

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 		3.3V 256K x 32/36 pipelined burst synchronous SRAM
AS7C33256PFD36A-133TQCN ISSI

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 		Standard SRAM, 256KX36, 4ns, CMOS, PQFP100, 14 X 20 MM, LEAD FREE, TQFP-100
AS7C33256PFD36A-133TQI ALSC

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 		3.3V 256K x 32/36 pipelined burst synchronous SRAM
AS7C33256PFD36A-133TQI ISSI

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 		暂无描述
AS7C33256PFD36A-133TQIN ALSC

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 		3.3V 256K x 32/36 pipelined burst synchronous SRAM
AS7C33256PFD36A-133TQIN ISSI

获取价格

 		Standard SRAM, 256KX36, 4ns, CMOS, PQFP100, 14 X 20 MM, LEAD FREE, TQFP-100
AS7C33256PFD36A-150BC ALSC

获取价格

 		Standard SRAM, 256KX36, 10ns, CMOS, PBGA119, 14 X 20 MM, BGA-119

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