AS4C1M16F5
®
5V 1M×16 CMOS DRAM (fast-page mode)
Features
• 1024 refresh cycles, 16 ms refresh interval
RAS-only or CAS-before-RAS refresh
• Organization: 1,048,576 words × 16 bits
• High speed
-
• Read-modify-write
- 50/60 ns RAS access time
- 20/25 ns fast page cycle time
- 13/17 ns CAS access time
• Low power consumption
• TTL-compatible, three-state DQ
• JEDEC standard package and pinout
- 400 mil, 42-pin SOJ
- 400 mil, 44/50-pin TSOP II
• 5V power supply
• Industrial and commercial temperature available
- Active:
880 mW max (AS4C1M16E0-60)
- Standby: 11 mW max, CMOS DQ
• Fast page mode
Pin arrangement
Pin designation
TSOP II
50
Pin(s)
A0 to A9
RAS
Description
SOJ
VCC
VSS
1
Address inputs
Vcc
DQ1
DQ2
DQ3
DQ4
Vcc
DQ5
DQ6
DQ7
DQ8
NC
1
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
VSS
DQ1
DQ2
DQ3
49
48
47
46
45
44
43
42
41
40
DQ16
DQ15
DQ14
DQ13
VSS
DQ12
DQ11
DQ10
DQ9
2
2
DQ16
DQ15
DQ14
DQ13
VSS
3
3
Row address strobe
Input/output
4
4
DQ4
5
5
DQ1 to DQ16
OE
VCC
6
6
DQ5
7
DQ12
DQ11
DQ10
DQ9
NC
7
Output enable
8
DQ6
DQ7
DQ8
8
9
9
WE
Write enable
10
11
12
13
14
15
16
17
18
19
20
21
10
11
NC
NC
NC
WE
LCAS
UCAS
OE
UCAS
LCAS
Column address strobe, upper byte
Column address strobe, lower byte
Power
RAS
NC
A9
NC
A8
NC
NC
WE
RAS
NC
NC
A0
36
35
34
33
32
31
30
29
NC
LCAS
UCAS
OE
15
16
17
18
19
20
21
22
VCC
A0
A7
A1
A6
VSS
Ground
A2
A5
A3
A4
A9
Vcc
VSS
A8
A7
A1
A6
A2
23
24
25
A5
28
27
26
A3
A4
VCC
VSS
Selection guide
Symbol
tRAC
tAA
AS4C1M16F5-50
50
AS4C1M16F5-60
Unit
Maximum RAS access time
60
30
ns
ns
Maximum column address access time
Maximum CAS access time
25
13
tCAC
tOEA
tRC
17
ns
Maximum output enable (OE) access time
Minimum read or write cycle time
Minimum fast page mode cycle time
Maximum operating current
13
15
ns
84
104
25
ns
tPC
20
ns
ICC1
ICC5
170
2.0
160
2.0
mA
mA
Maximum CMOS standby current
4/11/01; v.0.9.1
Alliance Semiconductor
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