8.0 UTP-PMD MAGNETICS CONNECTION
Resistors R1, R2 and R3 form a voltage divider in which
the receive signal, as presented to the DP83223, is attenu-
ated relative to the full receive amplitude. This amplitude
reduction is a good method of ensuring maximum operation-
al headroom of the embedded adaptive equalizer and asso-
ciated circuitry within the DP83223. In addition, this attenua-
tion can be adjusted to accommodate for magnetics inser-
tion loss.
This section focuses on suggested interconnection and lay-
out of the magnetics solution within the PMD. Due to the
high speed nature of Twisted Pair FDDI, careful layout prac-
tices are advised. Maintaining a 50X signal impedance and
keeping high speed signal traces as short as possible are
important design factors. The following design example
highlights several key areas of concern and also suggests
possibilities for improved overall system performance.
Resistors R4 and R5 form the back termination for the
transmit signal path. These resistors are terminated directly
to the TXGND (Transmit Ground) plane. Since the DP83223
TWISTER allows these back termination resistors to be ref-
erenced to ground, the noise coupled to the transmitted sig-
nal is less than those implementations which reference the
Figure 8 illustrates a typical magnetics layout using the Na-
tional Semiconductor DP83223 Twisted Pair Transceiver.
This layout example assumes the use of four planes to ac-
commodate the required power and signal routing as de-
scribed in the cross sectional view provided in the Legend
(Figure 9 ). Additionally, the Legend provides component
type and values as well as identification of various signal
paths and power planes. Circuit details of the layout follow:
output to V
.
CC
Resistors R6 through R9 provide the two unused twisted
pairs within the 4-pair bundle with 100X differential termina-
tion.
Capacitor C1 optionally helps to ensure that high frequency
energy outside of the intended passband across R3 will be
attenuated.
Resistors R10 through R13 provide good common mode
termination for each of the four twisted pairs within the bun-
dle. More specifically, R10 and R11 terminate the two un-
used twisted pairs while R12 and R13 terminate the two
active twisted pairs. R12 is connected between the primary
center tap of the receive transformer and the common
mode common point while R13 is connected between the
secondary center tap of the transmit transformer and the
common mode common point. Within some magnetics the
transmit channel isolation transformer primary and receive
channel isolation transformer secondary center taps are
pinned out. The example shown in Figure 8 assumes these
pins float.
Capacitors C2, C3 and C4 provide power supply decou-
pling for each of the designated power planes. C2 decou-
ples noise from TXV to TXGND. C3 decouples noise from
CC
RXV
CC
ECLV
to RXGND. Finally, C4 decouples noise from
to ECLGND.
CC
Ferrite Beads FB1 through FB4 provide good isolation be-
tween unique supply islands and planes. FB1 isolates the
RXGND (Receive Ground) island from the ECLGND plane.
FB2 isolates the RXV
CC
(Receive Power) island from the
ECLV plane. FB3 isolates the TXGND (Transmit Ground)
CC
island from the ECLGND plane. And F4 isolates the TXV
CC
Although the common mode termination design presented
here is a viable option, other designs may potentially pro-
vide improved performance as well. An additional point of
clarification: to date, the ANSI subcommittee on Twisted
Pair FDDI has not yet defined common mode termination of
any kind. However, data has been presented that indicates
a significant enhancement in EMC performance for Catego-
ry 5 cable fitted with common mode termination.
(Transmit Power) island from the ECLV
CC
plane. While
many implementations employ standard inductors of various
values for power supply isolation, National Semiconductor
recommends the use of Ferrite beads for improved isolation
and enhanced performance. Ferrite beads provide damping
of high frequency noise while not creating problems caused
by high Q inductors.
6
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