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AM28F010-70EIB

更新时间： 2024-09-14 23:00:27
品牌 Logo 应用领域
超微 - AMD 闪存
页数 文件大小 规格书
35页 466K
描述
1 Megabit (128 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory

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中文翻译

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AM28F010-70EIB 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：TSOP
包装说明：TSOP-32针数：32
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.32.00.51风险等级：5.32
最长访问时间：70 nsJESD-30 代码：R-PDSO-G32
JESD-609代码：e0长度：18.4 mm
内存密度：1048576 bit内存集成电路类型：FLASH
内存宽度：8功能数量：1
端子数量：32字数：131072 words
字数代码：128000工作模式：ASYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：128KX8封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH并行/串行：PARALLEL
峰值回流温度（摄氏度）：NOT SPECIFIED编程电压：12 V
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：TIN LEAD端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED类型：NOR TYPE
宽度：8 mmBase Number Matches：1

AM28F010-70EIB 数据手册

 浏览型号AM28F010-70EIB的Datasheet PDF文件第2页浏览型号AM28F010-70EIB的Datasheet PDF文件第3页浏览型号AM28F010-70EIB的Datasheet PDF文件第4页浏览型号AM28F010-70EIB的Datasheet PDF文件第5页浏览型号AM28F010-70EIB的Datasheet PDF文件第6页浏览型号AM28F010-70EIB的Datasheet PDF文件第7页 
FINAL  
Am28F010  
1 Megabit (128 K x 8-Bit)  
CMOS 12.0 Volt, Bulk Erase Flash Memory  
DISTINCTIVE CHARACTERISTICS  
■ High performance  
■ Flasherase™ Electrical Bulk Chip-Erase  
— 70 ns maximum access time  
— One second typical chip-erase  
■ CMOS Low power consumption  
— 30 mA maximum active current  
— 100 µA maximum standby current  
— No data retention power consumption  
■ Flashrite™ Programming  
— 10 µs typical byte-program  
— Two seconds typical chip program  
■ Command register architecture for  
microprocessor/microcontroller compatible  
write interface  
■ Compatible with JEDEC-standard byte-wide  
32-Pin EPROM pinouts  
— 32-pin PDIP  
■ On-chip address and data latches  
— 32-pin PLCC  
■ Advanced CMOS flash memory technology  
— 32-pin TSOP  
— Low cost single transistor memory cell  
■ 10,000 write/erase cycles minimum  
■ Automatic write/erase pulse stop timer  
■ Write and erase voltage 12.0 V ±5%  
■ Latch-up protected to 100 mA  
from –1 V to V  
+1 V  
CC  
GENERAL DESCRIPTION  
The Am28F010 is a 1 Megabit Flash memory orga-  
nized as 128 Kbytes of 8 bits each. AMD’s Flash mem-  
ories offer the most cost-effective and reliable read/  
write non-volatile random access memory. The  
Am28F010 is packaged in 32-pin PDIP, PLCC, and  
TSOP versions. It is designed to be reprogrammed  
and erased in-system or in standard EPROM pro-  
grammers. The Am28F010 is erased when shipped  
from the factory.  
AMD’s Flash technology reliably stores memory con-  
tents even after 10,000 erase and program cycles. The  
AMD cell is designed to optimize the erase and pro-  
gramming mechanisms. In addition, the combination of  
advanced tunnel oxide processing and low internal  
electric fields for erase and programming operations  
produces reliable cycling. The Am28F010 uses a  
12.0V±5% VPP high voltage input to perform the  
Flasherase and Flashrite algorithms.  
The standard Am28F010 offers access times as fast as  
70 ns, allowing operation of high-speed microproces-  
sors without wait states. To eliminate bus contention,  
the Am28F010 has separate chip enable (CE#) and  
output enable (OE#) controls.  
The highest degree of latch-up protection is achieved  
with AMD’s proprietary non-epi process. Latch-up pro-  
tection is provided for stresses up to 100 milliamps on  
address and data pins from –1 V to VCC +1 V.  
The Am28F010 is byte programmable using 10 ms pro-  
gramming pulses in accordance with AMD’s Flashrite  
programming algorithm. The typical room temperature  
programming time of the Am28F010 is two seconds.  
The entire chip is bulk erased using 10 ms erase pulses  
according to AMD’s Flasherase alrogithm. Typical era-  
sure at room temperature is accomplished in less than  
one second. The windowed package and the 15–20  
AMD’s Flash memories augment EPROM functionality  
with in-circuit electrical erasure and programming. The  
Am28F010 uses a command register to manage this  
functionality, while maintaining a JEDEC Flash Stan-  
dard 32-pin pinout. The command register allows for  
100% TTL level control inputs and fixed power supply  
levels during erase and programming, while maintain-  
ing maximum EPROM compatibility.  
Publication# 11559 Rev: H Amendment/+2  
Issue Date: January 1998  
1234567...35

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