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AFE1115E/1K PDF预览

AFE1115E/1K

更新时间： 2024-01-11 21:33:16
品牌 Logo 应用领域
德州仪器 - TI 电信光电二极管电信集成电路
页数 文件大小 规格书
14页 168K
描述
DATACOM, DIGITAL SLIC, PDSO56, PLASTIC, SSOP-56

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AFE1115E/1K 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SSOP包装说明：SSOP, SSOP56,.4
针数：56Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.75
数据速率：1168 MbpsJESD-30 代码：R-PDSO-G56
JESD-609代码：e0长度：18.415 mm
湿度敏感等级：3功能数量：1
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP56,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：220电源：3.3/5,5 V
认证状态：Not Qualified座面最大高度：2.794 mm
子类别：Other Telecom ICs标称供电电压：3.3 V
表面贴装：YES技术：CMOS
电信集成电路类型：DIGITAL SLIC温度等级：INDUSTRIAL
端子面层：TIN LEAD端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.5 mm
Base Number Matches：1

AFE1115E/1K 数据手册

 浏览型号AFE1115E/1K的Datasheet PDF文件第8页浏览型号AFE1115E/1K的Datasheet PDF文件第9页浏览型号AFE1115E/1K的Datasheet PDF文件第10页浏览型号AFE1115E/1K的Datasheet PDF文件第11页浏览型号AFE1115E/1K的Datasheet PDF文件第13页浏览型号AFE1115E/1K的Datasheet PDF文件第14页 
The performance of the VCXO is critically dependent on the  
external components and printed circuit board layout that is  
used. The varactor diodes and the crystal are particularly  
important components.  
Figure 8 shows an example of a printed circuit board layout  
of the sensitive VCXO circuitry for the circuit shown in  
Figure 7. There should be no ground planes, power planes or  
other traces in the white area indicated around the two  
sensitive points. The balance of the circuit board should be  
covered by ground planes where possible. With the circuit  
shown in Figure 7, these typical specifications were achieved.  
The printed circuit board layout containing the two varactor  
diodes, D1 and D2, in the VCXO external circuitry is critical  
to the performance of the VCXO. In particular, the two  
connection points of the varactor diodes shown in the Figure  
7 must have very low parasitic capacitance to ground to  
achieve the best tuning range possible. To achieve lowest  
parasitic capacitance to ground, there must be no ground  
plane or other PCB traces near these two points. Ground  
planes and other traces should be kept 1 cm away from these  
two points where possible.  
Pull Range at 20MHz  
±125ppm  
Frequency Range of Crystal that can be used  
Crystal Frequency  
10MHz to 28MHz  
48x baud rate  
Parasitic capacitance must be minimized  
at these points. No other traces or ground  
plane should be inside the dotted box.  
AFE1115  
DVDD  
68.1kΩ  
R2  
D2  
VCXO Input, 2  
150pF  
D1  
VCXO Output, 1  
68.1kΩ  
R4  
68.1kΩ  
150pF  
RL  
R5  
vcDAC, 47  
0.1µF  
Buffered VCXO Clock Output  
VCXO Clock Output, 3  
RL = 1kΩ for 5V Operation  
RL = 600Ω for 3.3V Operation  
D1 = D2 = Philips Semiconductor BB809  
FIGURE 7. VCXO Circuitry.  
No ground/power planes  
or other traces in this area  
Sensitive Points  
Ground  
Plane  
To AFE1115 Pin #47  
To AFE1115 Pin #2  
FIGURE 8. VCXO Circuit Layout, Approximately Two Times Actual Size.  
®
AFE1115  
12  
1...91011121314

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