®
AFE1203
AFE1203
2Mbps, Single Pair HDSL ANALOG FRONT END
● 48-LEAD SSOP PACKAGE
FEATURES
● SCALEABLE DATA RATE
● E1/T1 SINGLE PAIR 2B1Q OPERATION
● OPERATION FROM 2.3Mbps TO 160kbps
● COMPLETE ANALOG INTERFACE
● +5V ONLY (5V OR 3.3V DIGITAL)
● 385mW POWER DISSIPATION
● PROGRAMMABLE POWER
● –40°C TO +85°C OPERATION
on a single 5V supply. The digital circuitry in the unit can be
DESCRIPTION
connected to a supply from 3.3V to 5V. The chip uses only
Burr-Brown’s Analog Front End greatly reduces the size and
cost of a single pair HDSL (High bit rate Digital Subscriber
Line) system by providing all of the active analog circuitry
needed to connect an HDSL digital signal processor to an
external compromise hybrid and an HDSL line transformer.
The transmit and receive filter responses automatically change
with clock frequency, allowing the AFE1203 to operate over a
wide range of data rates. The power dissipation of the device
can be reduced under digital control for operation at lower
speeds. The AFE1203 will operate at bit rates from 160kbps to
2.3Mbps. It meets ETSI PSD specifications for single pair E1,
as well as ETSI and ANSI PSD specifications for two pair E1
and T1.
385mW for full-speed operation. It is housed in a small 48-lead
SSOP package.
The receive channel is designed around a fourth-order delta-
sigma analog-to-digital converter. It includes a difference am-
plifier designed to be used with an external compromise hybrid
for first-order analog echo cancellation. A programmable gain
amplifier with gains 0dB to +9dB is also included. The delta-
sigma modulator, operating at a 24X oversampling ratio, pro-
duces a 14-bit output at symbol rates up to 1168kHz (for
2.3Mbps operation).
The transmit channel consists of a digital-to-analog converter and
switched-capacitor pulse forming network followed by a differ-
ential line driver. The pulse forming network receives symbol
data and generates a standard 2B1Q output waveform. The
differential line driver uses a composite output stage combining
class B operation (for high efficiency driving large signals) with
class AB operation (to minimize crossover distortion).
Functionally, this unit consists of a transmit and a receive
section. The transmit section generates, filters, and buffers
outgoing 2B1Q data. The receive section filters and digitizes
the symbol data received on the telephone line. This IC operates
txLINEP
D/A
Converter
Pulse
Former
Line
Driver
txLINEN
REFP
VCM
PLLOUT
Voltage
Reference
PLLIN
Transmit
Control
REFN
txDAT
txCLK
rxSYNC
Receive
rxLOOP
Control
rxLINEP
rxLINEN
rxHYBP
rxHYBN
2
rxGAIN
Delta-Sigma
Modulator
14
Decimation
rxD13 - rxD0
Filter
Patents Pending
International Airport Industrial Park
•
Mailing Address: PO Box 11400, Tucson, AZ 85734
FAXLine: (800) 548-6133 (US/Canada Only)
• Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/
•
•
Cable: BBRCORP
•
Telex: 066-6491
•
FAX: (520) 889-1510
•
Immediate Product Info: (800) 548-6132
©1998 Burr-Brown Corporation
PDS-1460A
Printed in U.S.A. October, 1998
SBWS007
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