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AFE1203E1K PDF预览

AFE1203E1K

更新时间: 2022-06-13 21:30:29
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
15页 880K
描述
2Mbps, Single Pair HDSL ANALOG FRONT END

AFE1203E1K 数据手册

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rxLOOP INPUT  
THEORY OF OPERATION  
rxLOOP is the loopback control signal. When enabled, the  
rxLINEP and rxLINEN inputs are disconnected from the  
AFE. The rxHYBP and rxHYBN inputs remain connected.  
Loopback is enabled by applying a positive signal (Logic 1)  
to rxLOOP.  
The transmit channel consists of a D/A converter and a  
switched-capacitor pulse forming network followed by a  
differential line driver. The pulse forming network receives  
symbol data from the DSP and generates a 2B1Q output  
waveform. The output meets the pulse mask and power  
spectral density requirements defined in European Telecom-  
munications Standards Institute document RTR/TM-03036  
for E1 mode and in sections 6.2.1 and 6.2.2.1 of Bellcore  
technical advisory TA-NWT-001210 for T1 mode. The  
differential line driver uses a composite output stage com-  
bining class B operation (for high efficiency driving large  
signals) with class AB operation (to minimize crossover  
distortion).  
ECHO CANCELLATION IN THE AFE  
The rxHYB input is designed to be subtracted from the  
rxLINE input for first-order echo cancellation. To accom-  
plish this, note that the rxLINE input is connected to the  
same polarity signal at the transformer (positive to positive  
and negative to negative) while the rxHYB input is con-  
nected to opposite polarity through the compromise hybrid  
(negative to positive and positive to negative) as shown in  
Figure 2.  
The receive channel is designed around a fourth-order delta  
sigma A/D converter. It includes a difference amplifier  
designed to be used with an external compromise hybrid for  
first-order analog crosstalk reduction. A programmable gain  
amplifier with gains of 0dB to +9dB is also included. The  
delta sigma modulator operating at a 24X oversampling ratio  
produces 14 bits of resolution at output rates up to 584kHz.  
The basic functionality of the AFE1203 is illustrated in  
Figure 1.  
RECEIVE DATA CODING  
The data from the receive channel A/D converter is coded in  
Straight Offset Binary.  
ANALOG INPUT  
Positive Full Scale  
Negative Full Scale  
OUTPUT CODE (rxD13 - rxD0)  
11111111111111  
00000000000000  
The receive channel operates by summing the two differen-  
tial inputs, one from the line (rxLINE) and the other from the  
compromise hybrid (rxHYB). The connection of these two  
inputs so that the hybrid signal is subtracted from the line  
signal is described in the paragraph titled “Echo Cancella-  
tion in the AFE”. The equivalent gain for each input in the  
difference amp is 1. The resulting signal then passes to a  
programmable gain amplifier which can be set for gains of  
0dB through 9dB. The ADC converts the signal to a  
14-bit digital word, rxD13-rxD0.  
RECEIVE CHANNEL PROGRAMMABLE  
GAIN AMPLIFIER  
The gain of the amplifier at the input of the Receive Channel  
is set by two gain control pins, rxGAIN1 and rxGAIN0. The  
resulting gain between 0dB and +9dB is shown below.  
rxGAIN1  
rxGAIN0  
GAIN  
SCALEABLE TIMING  
0
0
1
1
0
1
0
1
0dB  
3.25dB  
6dB  
The AFE1203 scales operation with the clock frequency. All  
internal filters, the A/D converter, the D/A converter, and  
the pulse former change frequency with the clock speed so  
that the unit can be used at different frequencies by changing  
the clock speed.  
9dB  
txLINEP  
txLINEN  
D/A  
Converter  
Pulse Former  
txDAT  
Differential  
Line Driver  
rxHYBP  
rxHYBN  
14  
ADC  
rxD13 - rxD0  
rxLINEP  
rxLINEN  
Programmable  
Gain Amp  
Difference  
Amplifier  
FIGURE 1. Functional Block Diagram of AFE1203.  
®
AFE1203  
6

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