Datasheet > AFE1203E/1K

AFE1203E/1K

更新时间： 2024-02-10 02:56:46

品牌	Logo	应用领域
BB		电信光电二极管电信集成电路
页数	文件大小	规格书
16页	892K
描述
Digital SLIC, 1-Func, PDSO48, GREEN, SSOP-48

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技术参数
数据手册

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AFE1203E/1K 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Not Recommended	零件包装代码：	SSOP
包装说明：	SSOP, SSOP48,.4	针数：	48
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.29	数据速率：	2320 Mbps
JESD-30 代码：	R-PDSO-G48	JESD-609代码：	e4
长度：	15.875 mm	湿度敏感等级：	2
功能数量：	1	端子数量：	48
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SSOP
封装等效代码：	SSOP48,.4	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, SHRINK PITCH	峰值回流温度（摄氏度）：	260
电源：	3.3,5 V	认证状态：	Not Qualified
座面最大高度：	2.79 mm	子类别：	Other Telecom ICs
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	电信集成电路类型：	DIGITAL SLIC
温度等级：	INDUSTRIAL	端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7.5 mm	Base Number Matches：	1

AFE1203E/1K 数据手册

AFE1203

2Mbps, Single Pair HDSL ANALOG FRONT END

● 48-LEAD SSOP PACKAGE

FEATURES

● SCALEABLE DATA RATE

● E1/T1 SINGLE PAIR 2B1Q OPERATION

● OPERATION FROM 2.3Mbps TO 160kbps

● COMPLETE ANALOG INTERFACE

● +5V ONLY (5V OR 3.3V DIGITAL)

● 385mW POWER DISSIPATION

● PROGRAMMABLE POWER

● –40°C TO +85°C OPERATION

on a single 5V supply. The digital circuitry in the unit can be

DESCRIPTION

connected to a supply from 3.3V to 5V. The chip uses only

Burr-Brown’s Analog Front End greatly reduces the size and

cost of a single pair HDSL (High bit rate Digital Subscriber

Line) system by providing all of the active analog circuitry

needed to connect an HDSL digital signal processor to an

external compromise hybrid and an HDSL line transformer.

The transmit and receive filter responses automatically change

with clock frequency, allowing the AFE1203 to operate over a

wide range of data rates. The power dissipation of the device

can be reduced under digital control for operation at lower

speeds. The AFE1203 will operate at bit rates from 160kbps to

2.3Mbps. It meets ETSI PSD specifications for single pair E1,

as well as ETSI and ANSI PSD specifications for two pair E1

and T1.

385mW for full-speed operation. It is housed in a small 48-lead

SSOP package.

The receive channel is designed around a fourth-order delta-

sigma analog-to-digital converter. It includes a difference am-

plifier designed to be used with an external compromise hybrid

for first-order analog echo cancellation. A programmable gain

amplifier with gains 0dB to +9dB is also included. The delta-

sigma modulator, operating at a 24X oversampling ratio, pro-

duces a 14-bit output at symbol rates up to 1168kHz (for

2.3Mbps operation).

The transmit channel consists of a digital-to-analog converter and

switched-capacitor pulse forming network followed by a differ-

ential line driver. The pulse forming network receives symbol

data and generates a standard 2B1Q output waveform. The

differential line driver uses a composite output stage combining

class B operation (for high efficiency driving large signals) with

class AB operation (to minimize crossover distortion).

Functionally, this unit consists of a transmit and a receive

section. The transmit section generates, filters, and buffers

outgoing 2B1Q data. The receive section filters and digitizes

the symbol data received on the telephone line. This IC operates

txLINE_P

D/A

Converter

Pulse

Former

Line

Driver

txLINE_N

REF_P

V_CM

PLL_OUT

Voltage

Reference

PLL_IN

Transmit

Control

REF_N

txDAT

txCLK

rxSYNC

Receive

rxLOOP

Control

rxLINE_P

rxLINE_N

rxHYB_P

rxHYB_N

rxGAIN

Delta-Sigma

Modulator

Decimation

rxD13 - rxD0

Filter

Patents Pending

International Airport Industrial Park

•

Mailing Address: PO Box 11400, Tucson, AZ 85734

FAXLine: (800) 548-6133 (US/Canada Only)

• Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111

Internet: http://www.burr-brown.com/

•

Cable: BBRCORP

•

Telex: 066-6491

•

FAX: (520) 889-1510

•

Immediate Product Info: (800) 548-6132

PDS-1460A

Printed in U.S.A. October, 1998

SBWS007

12 3 4 5 6 7...16

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与AFE1203E/1K相关器件

型号	品牌	描述	获取价格	数据表
AFE1203E1K	TI	2Mbps, Single Pair HDSL ANALOG FRONT END	获取价格
AFE1203E1KG4	TI	2Mbps, Single Pair HDSL ANALOG FRONT END	获取价格
AFE1205	BB	2Mbps, Single Pair HDSL ANALOG FRONT END	获取价格
AFE1205E	BB	2Mbps, Single Pair HDSL ANALOG FRONT END	获取价格
AFE1205E/1KG4	TI	IC,XDSL INTERFACE,HDSL,ANALOG FRONT END,CMOS,SSOP,48PIN,PLASTIC	获取价格
AFE1224	BB	2Mbps, Single Pair ANALOG FRONT END	获取价格

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