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ADSP-BF544 PDF预览

ADSP-BF544

更新时间: 2024-11-27 04:48:55
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
82页 1486K
描述
Embedded Processor

ADSP-BF544 数据手册

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Blackfin®  
Embedded Processor  
Preliminary Technical Data  
ADSP-BF542/BF544/BF547/BF548/BF549  
FEATURES  
PERIPHERALS  
Up to 600 MHz High-Performance Blackfin Processor  
High-Speed USB On-the-Go (OTG) with Integrated PHY  
Two 16-Bit MACs, Two 40-Bit ALUs, Four 8-Bit Video ALUs  
RISC-Like Register and Instruction Model  
SD/SDIO Controller  
ATA/ATAPI-6 Controller  
0.9 V to 1.3 V Core VDD with On-chip Voltage Regulation  
2.5 V and 3.3 V-Tolerant I/O with Specific 5V-Tolerant Pins  
400-ball Lead-Free mBGA and 360-ball Lead-Free pBGA pack-  
age options.  
Up to four Synchronous Serial Ports (SPORTs)  
Up to three Serial Peripheral Interfaces (SPI-Compatible)  
Up to four UARTs, two with Automatic Hardware Flow  
Control  
Up to two CAN (Controller Area Network) 2.0B Interfaces  
Up to two TWI (Two-Wire Interface) Controllers  
8- or 16-Bit Asynchronous Host DMA Interface  
Multiple Enhanced Parallel Peripheral Interfaces (EPPIs), Sup-  
porting ITU-R BT.656 Video Formats and 18/24-bit LCD  
Connections  
MEMORY  
Up to 324K bytes of on-chip memory comprised of:  
Instruction SRAM/cache; instruction SRAM;  
data SRAM/cache; additional dedicated data SRAM;  
scratchpad SRAM (see Table 1 on Page 3 for available  
memory configurations  
External Sync Memory Controller Supporting  
DDR/Mobile DDR SDRAM  
External Async Memory Controller Supporting 8/16 bit Async  
Memories and Burst Flash Devices  
Media Transceiver (MXVR) for connection to a MOST®  
Network  
Pixel Compositor for overlays, alpha blending, and color  
conversion  
Up to eleven 32-Bit Timers/Counters with PWM Support  
Real-Time Clock (RTC) and Watchdog Timer  
Up/Down Counter With Support for Rotary Encoder  
Up to 152 General Purpose I/O (GPIOs)  
On-Chip PLL Capable of 0.5x to 64x Frequency Multiplication  
Debug/JTAG Interface  
NAND Flash Controller  
Four Memory-to-Memory DMA pairs, two with ext. requests  
Memory Management Unit Providing Memory Protection  
Flexible Booting Options  
Code Security with LockboxTM Secure Technology  
One-Time-Programmable (OTP) Memory  
VOLTAGE  
REGULATOR  
JTAG TEST AND  
EMULATION  
WATCHDOG  
TIMER  
CAN (0-1)  
RTC  
OTP  
TWI (0-1)  
HOST DMA  
UART (0-1)  
UART (2-3)  
SPI (0-1)  
PAB 16  
TIMERS(0-10)  
INTERRUPTS  
B
COUNTER  
KEYPAD  
L2  
SRAM  
L1  
INSTR ROM  
L1  
L1  
INSTR SRAM  
DATA SRAM  
SPI (2)  
32-BIT DMA  
16-BIT DMA  
MXVR  
DAB1 32  
DAB0 16  
DCB 32  
EAB 64  
DEB 32  
SPORT (2-3)  
SPORT (0-1)  
SD / SDIO  
USB  
BOOT  
ROM  
EXTERNAL PORT  
NOR, DDR1 CONTROL  
ATAPI  
EPPI (0-2)  
DDR1  
16  
ASYNC  
16  
NAND FLASH  
CONTRLOLLER  
PIXEL  
COMPOSITOR  
Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.  
Figure 1. ADSP-BF549 Functional Block Diagram  
Rev. PrG  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O.Box 9106, Norwood, MA 02062-9106 U.S.A.  
Tel:781/329-4700  
Fax:781/461-3113  
www.analog.com  
© 2007 Analog Devices, Inc. All rights reserved.  

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