Datasheet > ADRF6518

ADRF6518

更新时间： 2024-01-24 18:46:22

品牌	Logo	应用领域
亚德诺 - ADI		放大器
页数	文件大小	规格书
36页	1621K
描述
63 MHz Dual Programmable Filters and Variable Gain Amplifiers

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技术参数
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ADRF6518 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	包装说明：	HVQCCN,
针数：	32	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.65	商用集成电路类型：	CONSUMER CIRCUIT
JESD-30 代码：	S-XQCC-N32	JESD-609代码：	e3
长度：	5 mm	湿度敏感等级：	3
功能数量：	1	端子数量：	32
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	HVQCCN
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	座面最大高度：	0.8 mm
最大供电电压 (Vsup)：	3.45 V	最小供电电压 (Vsup)：	3.15 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn)	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	30	宽度：	5 mm
Base Number Matches：	1

ADRF6518 数据手册

63 MHz Dual Programmable Filters and

Variable Gain Amplifiers

Preliminary Technical Data

ADRF6518

FEATURES

FUNCTIONAL BLOCK DIAGRAM

Matched pair of programmable filters and triple VGAs

Continuous gain control range: 72 dB

Digital gain control: 30 dB

6-pole Butterworth filter: 1 MHz to 63 MHz

in 1 MHz steps, 1 dB corner frequency

Preamplifier and postamplifier gain steps

Peak detector

Filter bypass mode, −3 dB bandwidth (BW)

VGA2 and VGA3 21 dB/12 dB gain: 350 MHz/700 MHz

IMD3: >65 dBc for 1.5 V p-p composite output

HD2, HD3: >65 dBc for 1.5 V p-p output

Differential input and output

Flexible output and input common-mode ranges

Optional dc output offset correction

SPI programmable filter corners and gain steps

Single 3.3 V supply operation with power-down feature

APPLICATIONS

Baseband I/Q receivers

Diversity receivers

ADC drivers

Figure 1.

Point-to-point and point-to-multipoint radios

Instrumentation

Medical

GENERAL DESCRIPTION

The ADRF6518 is a matched pair of fully differential low noise and

low distortion programmable filters and variable gain amplifiers

(VGAs). Each channel is capable of rejecting large out-of-band

interferers while reliably boosting the wanted signal, thus reducing

the bandwidth and resolution requirements on the analog-to-

digital converters (ADCs). The excellent matching between

channels and their high spurious-free dynamic range over all

gain and bandwidth settings make the ADRF6518 ideal for

quadrature-based (IQ) communication systems with dense

constellations, multiple carriers, and nearby interferers. The

various amplifier gains, filter corners and other features are all

programmable via a serial port interface (SPI) port.

peak signal at the filter inputs. The pair of VGAs that follow the

filters each provides 24 dB of continuous gain control with fixed

gain options of 12 dB, 15 dB, 18 dB, and 21 dB. The output buffers

offer an additional option of 3 dB or 9 dB gain and provide a

differential output impedance of less than 10 Ω. They are

capable of driving 3 V p-p into 1 kΩ loads at better than 65 dBc

HD3. The output common-mode voltage defaults to VPS/2 and

can be adjusted down to 900 mV by driving the high impedance

VOCM pin. Independent, built-in dc offset correction loops for

each channel can be disabled via the SPI if fully dc-coupled

operation is desired. The high-pass corner frequency is deter-

mined by external capacitors on the OFS1 and OFS2 pins and the

postfilter VGA gain.

The first VGA that precedes the filters offers 24 dB of continuous

gain control with fixed gain options of 9 dB, 12 dB, and 15 dB, and

sets a differential input impedance of 400 Ω. The filters provide

a six-pole Butterworth response with 1 dB corner frequencies

from 1 MHz to 63 MHz in 1 MHz steps. For operation beyond

63 MHz, the filter can be disabled and completely bypassed via

the SPI. A wideband peak detector is available to monitor the

The ADRF6518 operates from a 3.15 V to 3.45 V supply and

consumes a maximum supply current of 400 mA. When fully

disabled, it consumes <10 mA. The ADRF6518 is fabricated in

an advanced silicon-germanium BiCMOS process and is available

in a 32-lead, exposed pad LFCSP. Performance is specified over

the −40°C to +85°C temperature range.

Rev. PrA

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rightsof third parties that may result fromits use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks andregisteredtrademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Technical Support

www.analog.com

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与ADRF6518相关器件

型号	品牌	获取价格	描述	数据表
ADRF6518ACPZ-R7	ADI	获取价格	63 MHz Dual Programmable Filters and Variable Gain Amplifiers
ADRF6518ACPZ-WP	ADI	获取价格	63 MHz Dual Programmable Filters and Variable Gain Amplifiers
ADRF6518-EVALZ	ADI	获取价格	63 MHz Dual Programmable Filters and Variable Gain Amplifiers
ADRF6520	ADI	获取价格	Dual Programmable Filters and VGAs
ADRF6520ACPZ	ADI	获取价格	Dual Programmable Filters and VGAs for 2 GHz
ADRF6520ACPZ-R7	ADI	获取价格	Dual Programmable Filters and VGAs for 2 GHz
ADRF6520-EVALZ	ADI	获取价格	Dual Programmable Filters and VGAs
ADRF6521	ADI	获取价格	Low Frequency to 3 GHz, Dual VGA with Output Common-Mode and DC Offset Control
ADRF6521ACPZ	ADI	获取价格	Low Frequency to 3 GHz, Dual VGA with Output Common-Mode and DC Offset Control
ADRF6521ACPZ-R7	ADI	获取价格	Low Frequency to 3 GHz, Dual VGA with Output Common-Mode and DC Offset Control

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