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ADN4665ARZ

更新时间： 2024-02-15 12:12:52
品牌 Logo 应用领域
亚德诺 - ADI 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管PC
页数 文件大小 规格书
12页 252K
描述
3 V, LVDS, Quad, CMOS Differential Line Driver

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ADN4665ARZ 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：ROHS COMPLIANT, MS-012AC, SOIC-16针数：16
Reach Compliance Code：unknown风险等级：5.48
差分输出：YES驱动器位数：4
输入特性：STANDARD接口集成电路类型：LINE DRIVER
接口标准：EIA-644; TIA-644JESD-30 代码：R-PDSO-G16
JESD-609代码：e3长度：9.9 mm
湿度敏感等级：1功能数量：1
端子数量：16最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：225
座面最大高度：1.75 mm最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：MATTE TIN
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
最大传输延迟：2 ns宽度：3.9 mm
Base Number Matches：1

ADN4665ARZ 数据手册

 浏览型号ADN4665ARZ的Datasheet PDF文件第1页浏览型号ADN4665ARZ的Datasheet PDF文件第2页浏览型号ADN4665ARZ的Datasheet PDF文件第3页浏览型号ADN4665ARZ的Datasheet PDF文件第5页浏览型号ADN4665ARZ的Datasheet PDF文件第6页浏览型号ADN4665ARZ的Datasheet PDF文件第7页 
ADN4665  
TIMING CHARACTERISTICS  
1
VCC = ±.0 V to ±.6 V, RL = 100 Ω, CL = 15 pF to GND, all specifications TMIN to TMAX, unless otherwise noted. All typical values are given  
for VCC = ±.± V, TA = 25°C.  
Table 2.  
Parameter2  
Symbol Min  
Typ  
Max Unit  
Conditions/Comments3, 4  
AC CHARACTERISTICS  
Differential Propagation Delay, High to Low  
Differential Propagation Delay, Low to High  
tPHLD  
tPLHD  
tSKD1  
tSKD2  
tSKD3  
tSKD4  
tTLH  
tTHL  
tPHZ  
tPLZ  
0.8  
0.8  
0
0
0
1.18  
1.25  
0.07  
0.1  
2.0  
2.0  
0.4  
0.5  
1.0  
1.2  
1.5  
1.5  
5
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
MHz  
See Figure 3 and Figure 4  
See Figure 3 and Figure 4  
See Figure 3 and Figure 4  
See Figure 3 and Figure 4  
See Figure 3 and Figure 4  
See Figure 3 and Figure 4  
See Figure 3 and Figure 4  
See Figure 3 and Figure 4  
See Figure 5 and Figure 6  
See Figure 5 and Figure 6  
See Figure 5 and Figure 6  
See Figure 5 and Figure 6  
See Figure 5 and Figure 6  
5
6
7
8
Differential Pulse Skew |tPHLD − tPLHD  
Channel-to-Channel Skew  
Differential Part-to-Part Skew  
Differential Part-to-Part Skew  
Rise Time  
|
0
0.38  
0.4  
Fall Time  
Disable Time High to Inactive  
Disable Time Low to Inactive  
Enable Time Inactive to High  
Enable Time Inactive to Low  
Maximum Operating Frequency  
5
7
7
tPZH  
tPZL  
fMAX  
9
200  
250  
1 CL includes probe and jig capacitance.  
2 AC parameters are guaranteed by design and characterization.  
3 Generator waveform for all tests, unless otherwise specified: f = 50 MHz, ZO = 50 Ω, tr ≤ 1 ns, and tf ≤ 1 ns.  
4 All input voltages are for one channel, unless otherwise specified. Other inputs are set to GND.  
5 tSKD1 = |tPHLD − tPLHD| is the magnitude difference in differential propagation delay time between the positive-going edge and the negative-going edge of the  
same channel.  
6 tSKD2 is the differential channel-to-channel skew of any event on the same device.  
7 tSKD3, differential part-to-part skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This specification  
applies to devices at the same VCC and within 5°C of each other within the operating temperature range.  
8 tSKD4, part-to-part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over the recommended operating  
temperature and voltage ranges, and across process distribution. tSKD4 is defined as |maximum − minimum| differential propagation delay.  
9 fMAX generator input conditions: tr = tf < 1 ns (0% to 100%), 50% duty cycle, 0 V to 3 V. Output criteria: duty cycle = 45% to 55%, VOD > 250 mV, all channels switching.  
Test Circuits and Timing Diagrams  
D
OUTx+  
V
CC  
R /2  
L
D
INx  
V
V
V
OD  
V
OS  
R /2  
L
D
OUTx–  
NOTES  
1. DRIVER IS ENABLED.  
Figure 2. Test Circuit for Driver VOD and VOS  
V
CC  
D
D
OUTx+  
C
C
L
D
INx  
SIGNAL  
GENERATOR  
OUTx–  
50Ω  
L
DRIVER IS  
ENABLED  
NOTES  
1. C INCLUDES PROBE AND JIG CAPACITANCE.  
L
Figure 3. Test Circuit for Driver Propagation Delay and Transition Time  
Rev. 0 | Page 4 of 12  
 
 
 
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