Datasheet > ADN4667WARZ-REEL7

ADN4667WARZ-REEL7

更新时间： 2024-11-27 12:53:47

品牌	Logo	应用领域
亚德诺 - ADI		驱动器
页数	文件大小	规格书
16页	305K
描述
3 V LVDS Quad CMOS Differential Line Driver

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3 V LVDS Quad CMOS

Differential Line Driver

Data Sheet

ADN4667

FEATURES

FUNCTIONAL BLOCK DIAGRAM

15 kV ESD protection on output pins

400 Mbps (200 MHz) switching rates

Flow through pinout simplifies PCB layout

300 ps typical differential skew

400 ps maximum differential skew

1.7 ns maximum propagation delay

3.3 V power supply

ADN4667

OUT1+

IN1

IN2

IN3

IN4

OUT1–

OUT2+

OUT2–

OUT3+

310 mV differential signaling

OUT3–

Low power dissipation (10 mW typical)

Interoperable with existing 5 V LVDS receivers

High impedance on LVDS outputs on power-down

Conforms to TIA/EIA-644 LVDS standards

Industrial operating temperature range: −40°C to +85°C

Available in surface-mount (SOIC) and low profile

TSSOP package

OUT4+

OUT4–

GND

Figure 1.

Qualified for automotive applications

APPLICATIONS

Backplane data transmission

Cable data transmission

Clock distribution

GENERAL DESCRIPTION

The ADN4667 is a quad, CMOS, low voltage differential signaling

(LVDS) line driver offering data rates of over 400 Mbps (200 MHz)

and ultralow power consumption. It features a flow through

pinout for easy PCB layout and separation of input and output

signals.

The ADN4667 also offers active high and active low enable/

disable inputs (EN and ). These inputs control all four drivers

and turn off the current outputs in the disabled state to reduce

the quiescent power consumption to typically 10 mW.

The ADN4667 and its companion LVDS receiver, the ADN4668,

offer a new solution to high speed, point-to-point data trans-

mission, and a low power alternative to emitter-coupled logic

(ECL) or positive emitter-coupled logic (PECL).

The device accepts low voltage TTL/CMOS logic signals and

converts them to a differential current output of typically 3.1 mA

for driving a transmission medium such as a twisted pair cable.

The transmitted signal develops a differential voltage of typi-

cally 310 mV across a termination resistor at the receiving end.

This is converted back to a TTL/CMOS logic level by an LVDS

receiver, such as the ADN4668.

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rightsof third parties that may result fromits use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks andregisteredtrademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

www.analog.com

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与ADN4667WARZ-REEL7相关器件

型号	品牌	获取价格	描述	数据表
ADN4668	ADI	获取价格	3 V LVDS Quad CMOS Differential Line Receiver
ADN4668ARUZ	ADI	获取价格	3 V LVDS Quad CMOS Differential Line Receiver
ADN4668ARUZ1	ADI	获取价格	3 V LVDS Quad CMOS Differential Line Receiver
ADN4668ARUZ-REEL7	ADI	获取价格	3 V LVDS Quad CMOS Differential Line Receiver
ADN4668ARUZ-REEL71	ADI	获取价格	3 V LVDS Quad CMOS Differential Line Receiver
ADN4668ARZ	ADI	获取价格	3 V LVDS Quad CMOS Differential Line Receiver
ADN4668ARZ1	ADI	获取价格	3 V LVDS Quad CMOS Differential Line Receiver
ADN4668ARZ-REEL7	ROCHESTER	获取价格	QUAD LINE RECEIVER, PDSO16, ROHS COMPLIANT, MO-012AC, SOIC-16
ADN4668ARZ-REEL71	ADI	获取价格	3 V LVDS Quad CMOS Differential Line Receiver
ADN4670	ADI	获取价格	Programmable Low Voltage 1:10 LVDS Clock Driver

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