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ADN4668ARZ

更新时间: 2024-11-20 12:36:11
品牌 Logo 应用领域
亚德诺 - ADI 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管PC
页数 文件大小 规格书
12页 286K
描述
3 V LVDS Quad CMOS Differential Line Receiver

ADN4668ARZ 数据手册

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3 V LVDS Quad CMOS  
Differential Line Receiver  
ADN4668  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
V
CC  
15 kV ESD protection on receiver input pins  
400 Mbps (200 MHz) switching rates  
Flow-through pin configuration simplifies PCB layout  
150 ps channel-to-channel skew (typical)  
100 ps differential skew (typical)  
ADN4668  
R
R
IN1+  
R1  
R2  
R3  
R4  
R
R
R
R
OUT1  
OUT2  
OUT3  
OUT4  
IN1–  
R
R
IN2+  
2.7 ns maximum propagation delay  
3.3 V power supply  
IN2–  
High impedance outputs on power-down  
Low power design (3 mW quiescent typical)  
Interoperable with existing 5 V LVDS drivers  
Accepts small swing (310 mV typical) differential  
input signal levels  
R
R
IN3+  
IN3–  
R
R
IN4+  
IN4–  
Supports open, short, and terminated input fail-safe  
0 V to −100 mV threshold region  
EN  
EN  
Conforms to TIA/EIA-644 LVDS standard  
Industrial operating temperature range of −40°C to +85°C  
Available in 16-lead surface-mount SOIC and 16-lead low  
profile TSSOP package  
GND  
Figure 1.  
APPLICATIONS  
Point-to-point data transmission  
Multidrop buses  
Clock distribution networks  
Backplane receivers  
GENERAL DESCRIPTION  
The ADN4668 is a quad-channel CMOS, low voltage differential  
signaling (LVDS) line receiver offering data rates of over 400 Mbps  
(200 MHz) and ultralow power consumption. It features a flow-  
through pin configuration for easy PCB layout and separation  
of input and output signals.  
The ADN4668 also offers active-high and active-low enable/disable  
EN  
the receivers and switch the outputs to a high impedance state.  
inputs (EN and  
) that control all four receivers. They disable  
This high impedance state allows the outputs of one or more  
ADN4668s to be multiplexed together and reduces the quies-  
cent power consumption to 3 mW typical.  
The device accepts low voltage (310 mV typical) differential  
input signals and converts them to a single-ended, 3 V TTL/CMOS  
logic level.  
The ADN4668 and its companion driver, the ADN4667, offer  
a new solution to high speed, point-to-point data transmission  
and a low power alternative to emitter-coupled logic (ECL) or  
positive emitter-coupled logic (PECL).  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2008 Analog Devices, Inc. All rights reserved.  
 

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