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ADCMP552_15 PDF预览

ADCMP552_15

更新时间: 2024-11-24 01:11:23
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亚德诺 - ADI /
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16页 259K
描述
Single Supply High Speed PECL/LVPECL Comparators

ADCMP552_15 数据手册

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Single Supply High Speed  
PECL/LVPECL Comparators  
Data Sheet  
ADCMP551/ADCMP552/ADCMP553  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
HYS*  
Single power supply  
500 ps propagation delay input to output  
125 ps overdrive dispersion  
Differential PECL/LVPECL compatible outputs  
Differential latch control  
NONINVERTING  
Q OUTPUT  
INPUT  
ADCMP551/  
ADCMP552/  
ADCMP553  
INVERTING  
Q OUTPUT  
INPUT  
Internal latch pull-up resistors  
Power supply rejection greater than 70 dB  
700 ps minimum pulse width  
LATCH ENABLE  
LATCH ENABLE  
INPUT  
INPUT  
Equivalent input rise time bandwidth > 750 MHz  
Typical output rise/fall of 500 ps  
Programmable hysteresis  
*ADCMP552 ONLY  
Figure 1.  
GENERAL DESCRIPTION  
APPLICATIONS  
The ADCMP551/ADCMP552/ADCMP553 are single supply,  
high speed comparators fabricated on Analog Devices’ proprietary  
XFCB process. The devices feature a 500 ps propagation delay  
with less than 125 ps overdrive dispersion. Overdrive dispersion,  
a measure of the difference in propagation delay under differing  
overdrive conditions, is a particularly important characteristic  
of high speed comparators. A separate programmable hysteresis  
pin is available on the ADCMP552.  
Automatic test equipment  
High speed instrumentation  
Scope and logic analyzer front ends  
Window comparators  
High speed line receivers  
Threshold detection  
Peak detection  
High speed triggers  
Patient diagnostics  
A differential input stage permits consistent propagation delay  
with a common-mode range from –0.2 V to VCCI – 2.0 V. Outputs  
are complementary digital signals and are fully compatible with  
PECL and 3.3V LVPECL logic families. The outputs provide  
sufficient drive current to directly drive transmission lines  
terminated in 50 Ω to VCCO − 2 V. A latch input is included  
and permits tracking, track-and-hold, or sample-and-hold  
modes of operation. The latch input pins contain internal pull-  
ups that set the latch in tracking mode when left open.  
Disk drive read channel detection  
Hand-held test instruments  
Zero crossing detectors  
Line receivers and signal restoration  
Clock drivers  
The ADCMP551/ADCMP552/ADCMP553 are specified over  
the –40°C to +85°C industrial temperature range. The ADCMP551  
is available in a 16-lead QSOP package; the ADCMP552 is available  
in a 20-lead QSOP package; and the ADCMP553 is available in  
an 8-lead MSOP package.  
Rev. A  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2004–2013 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 

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