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ADCMP562BRQZ-RL7 PDF预览

ADCMP562BRQZ-RL7

更新时间： 2024-11-23 21:15:59
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亚德诺 - ADI 放大器光电二极管
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14页 281K
描述
Dual High Speed PECL Comparator 20 - Lead QSOP

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ADCMP562BRQZ-RL7 数据手册

 浏览型号ADCMP562BRQZ-RL7的Datasheet PDF文件第2页浏览型号ADCMP562BRQZ-RL7的Datasheet PDF文件第3页浏览型号ADCMP562BRQZ-RL7的Datasheet PDF文件第4页浏览型号ADCMP562BRQZ-RL7的Datasheet PDF文件第5页浏览型号ADCMP562BRQZ-RL7的Datasheet PDF文件第6页浏览型号ADCMP562BRQZ-RL7的Datasheet PDF文件第7页 
Dual High Speed PECL Comparators  
ADCMP561/ADCMP562  
Data Sheet  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
HYS*  
Differential PECL-compatible outputs  
700 ps propagation delay input to output  
75 ps propagation delay dispersion  
Input common-mode range: –2.0 V to +3.0 V  
Robust input protection  
NONINVERTING  
Q OUTPUT  
INPUT  
ADCMP561/  
ADCMP562  
INVERTING  
Q OUTPUT  
INPUT  
Differential latch control  
Internal latch pull-up resistors  
Power supply rejection greater than 85 dB  
700 ps minimum pulse width  
LATCH ENABLE  
LATCH ENABLE  
INPUT  
INPUT  
*ADCMP562 ONLY  
1.5 GHz equivalent input rise time bandwidth  
Typical output rise/fall time of 500 ps  
ESD protection > 4 kV HBM, >200 V MM  
Programmable hysteresis  
Figure 1.  
1
2
3
4
5
6
7
8
16 QB  
QA  
QA  
15 QB  
14 GND  
13 LEB  
12 LEB  
V
DD  
APPLICATIONS  
ADCMP561  
TOP VIEW  
(Not to Scale)  
LEA  
Automatic test equipment  
High speed instrumentation  
Scope and logic analyzer front ends  
Window comparators  
LEA  
11  
V
V
CC  
10 –INB  
+INB  
EE  
–INA  
+INA  
9
High speed line receivers  
Threshold detection  
Figure 2. ADCMP561 16-Lead QSOP Pin Configuration  
Peak detection  
V
V
DD  
High speed triggers  
Patient diagnostics  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
DD  
QA  
QA  
QB  
QB  
3
Disk drive read channel detection  
Hand-held test instruments  
Zero-crossing detectors  
Line receivers and signal restoration  
Clock drivers  
ADCMP562  
TOP VIEW  
(Not to Scale)  
V
GND  
LEB  
LEB  
4
DD  
LEA  
5
LEA  
6
V
V
7
EE  
CC  
–INA  
+INA  
–INB  
+INB  
HYSB  
8
9
HYSA  
10  
Figure 3. ADCMP562 20-Lead QSOP Pin Configuration  
GENERAL DESCRIPTION  
The ADCMP561/ADCMP562 are high speed comparators  
fabricated on Analog Devices, Inc., proprietary XFCB process. The  
devices feature a 700 ps propagation delay with less than 75 ps  
overdrive dispersion. Dispersion, a measure of the difference in  
propagation delay under differing overdrive conditions, is a  
particularly important characteristic of comparators. A separate  
programmable hysteresis pin is available on the ADCMP562.  
to +3.0 V. Outputs are complementary digital signals that are fully  
compatible with PECL 10 K and 10 KH logic families. The outputs  
provide sufficient drive current to directly drive transmission lines  
terminated in 50 Ω to VDD − 2 V. A latch input, which is included,  
permits tracking, track-and-hold, or sample-and-hold modes of  
operation. The latch input pins contain internal pull-ups that set  
the latch in tracking mode when left open.  
A differential input stage permits consistent propagation delay with  
a wide variety of signals in the common-mode range from −2.0 V  
The ADCMP561/ADCMP562 are specified over the industrial  
temperature range (−40°C to +85°C).  
Rev. B  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed byAnalog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarksandregisteredtrademarksare the property oftheir respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2004–2017 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 
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ADCMP562BRQZ-RL7 替代型号

型号 品牌 替代类型 描述 数据表
ADCMP562BRQZ ADI

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 Dual High Speed PECL Comparators

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