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ADCMP563BCPZ-RL7 PDF预览

ADCMP563BCPZ-RL7

更新时间： 2024-11-26 15:27:39
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亚德诺 - ADI 放大器
页数 文件大小 规格书
15页 298K
描述
Dual High Speed ECL Comparator 16 - Lead QSOP

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ADCMP563BCPZ-RL7 数据手册

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Dual, High Speed ECL Comparators  
ADCMP563/ADCMP564  
Data Sheet  
FEATURES  
FUNCTIONAL BLOCK DIAGRAMS  
HYS*  
Differential ECL-compatible outputs  
700 ps propagation delay input to output  
75 ps propagation delay dispersion  
Input common-mode range: –2.0 V to +3.0 V  
Robust input protection  
NONINVERTING  
Q OUTPUT  
INPUT  
ADCMP563/  
ADCMP564  
INVERTING  
Q OUTPUT  
INPUT  
Differential latch control  
Internal latch pull-up resistors  
Power supply rejection greater than 85 dB  
700 ps minimum pulse width  
LATCH ENABLE  
LATCH ENABLE  
INPUT  
INPUT  
*ADCMP564 ONLY  
1.5 GHz equivalent input rise time bandwidth  
Typical output rise/fall time of 500 ps  
ESD protection > 4kV HBM, >200V MM  
Programmable hysteresis  
Figure 1.  
1
2
3
4
5
6
7
8
16 QB  
QA  
QA  
15 QB  
14 GND  
13 LEB  
12 LEB  
APPLICATIONS  
GND  
LEA  
LEA  
ADCMP563  
BRQ  
TOP VIEW  
(Not to Scale)  
Automatic test equipment  
High speed instrumentation  
Scope and logic analyzer front ends  
Window comparators  
High speed line receivers  
Threshold detection  
11  
V
V
CC  
10 –INB  
+INB  
EE  
–INA  
+INA  
9
Peak detection  
Figure 2. ADCMP563 16-Lead QSOP  
High speed triggers  
Patient diagnostics  
Hand-held test instruments  
Zero crossing detectors  
Line receivers and signal restoration  
Clock drivers  
GND  
QA  
GND  
QB  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
QA  
QB  
3
ADCMP564  
BRQ  
TOP VIEW  
(Not to Scale)  
GND  
LEA  
LEA  
GND  
LEB  
LEB  
4
5
6
GENERAL DESCRIPTION  
V
V
7
EE  
CC  
The ADCMP563/ADCMP564 are high speed comparators  
fabricated on Analog Devices’ proprietary XFCB process. The  
devices feature a 700 ps propagation delay with less than 75 ps  
overdrive dispersion. Dispersion, a measure of the difference in  
propagation delay under differing overdrive conditions, is a partic-  
ularly important characteristic of high speed comparators. A separate  
programmable hysteresis pin is available on the ADCMP564.  
–INA  
+INA  
–INB  
+INB  
HYSB  
8
9
HYSA  
10  
Figure 3. ADCMP564 20-Lead QSOP  
–INA  
+INA  
+INB  
–INB  
1
2
3
4
12 QA  
11 QA  
A differential input stage permits consistent propagation delay  
with a wide variety of signals in the common-mode range from  
−2.0 V to +3.0 V. Outputs are complementary digital signals that  
are fully compatible with ECL 10 K and 10 KH logic families.  
The outputs provide sufficient drive current to directly drive  
transmission lines terminated in 50 Ω to −2 V. A latch input,  
which is included, permits tracking, track-and-hold, or sample-  
and-hold modes of operation. The latch input pins contain internal  
pull-ups that set the latch in tracking mode when left open.  
ADCMP563  
BCP  
10  
9
QB  
QB  
TOP VIEW  
(Not to Scale)  
NOTES  
1. THE EXPOSED PAD SHOULD BE EITHER CONNECTED TO VEE OR LEFT FLOATING.  
Figure 4. ADCMP563 16-Lead LFCSP  
The ADCMP563/ADCMP564 are specified over the industrial  
temperature range (−40°C to +85°C).  
Rev. D  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2007–2016 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 
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