Dual, High Speed ECL Comparators
ADCMP563/ADCMP564
FUNCTIONAL BLOCK DIAGRAM
FEATURES
HYS*
Differential ECL-compatible outputs
700 ps propagation delay input to output
75 ps propagation delay dispersion
Input common-mode range: –2.0 V to +3.0 V
Robust input protection
NONINVERTING
Q OUTPUT
INPUT
ADCMP563/
ADCMP564
INVERTING
Q OUTPUT
INPUT
Differential latch control
Internal latch pull-up resistors
Power supply rejection greater than 85 dB
700 ps minimum pulse width
LATCH ENABLE
LATCH ENABLE
INPUT
INPUT
*ADCMP564 ONLY
1.5 GHz equivalent input rise time bandwidth
Typical output rise/fall time of 500 ps
ESD protection > 4kV HBM, >200V MM
Programmable hysteresis
Figure 1.
GND
QA
GND
QB
1
2
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
16
QB
QA
QA
QA
QB
3
15 QB
ADCMP564
BRQ
TOP VIEW
(Not to Scale)
GND
LEA
LEA
GND
LEB
LEB
4
14 GND
13 LEB
12 LEB
APPLICATIONS
GND
LEA
LEA
5
ADCMP563
BRQ
Automatic test equipment
High speed instrumentation
Scope and logic analyzer front ends
Window comparators
High speed line receivers
Threshold detection
6
TOP VIEW
(Not to Scale)
V
V
7
EE
CC
11
V
V
CC
10 –INB
+INB
EE
–INA
+INA
–INB
+INB
HYSB
8
–INA
+INA
9
9
HYSA
10
Peak detection
Figure 2. ADCMP563 16-Lead QSOP
Figure 3. ADCMP564 20-Lead QSOP
High speed triggers
Patient diagnostics
Hand-held test instruments
Zero crossing detectors
Line receivers and signal restoration
Clock drivers
V
LEA LEA GND
EE
16
15
14
13
PIN1
–INA
+INA
+INB
–INB
QA
QA
QB
QB
1
2
3
4
12
11
10
9
ADCMP563
BCP
TOP VIEW
(Not to Scale)
5
6
7
8
GENERAL DESCRIPTION
V
LEB LEB GND
CC
Figure 4. ADCMP563 16-Lead LFCSP
The ADCMP563/ADCMP564 are high speed comparators
fabricated on Analog Devices’ proprietary XFCB process. The
devices feature a 700 ps propagation delay with less than 75 ps
overdrive dispersion. Dispersion, a measure of the difference in
propagation delay under differing overdrive conditions, is a
particularly important characteristic of high speed comparators.
A separate programmable hysteresis pin is available on the
ADCMP564.
that are fully compatible with ECL 10 K and 10 KH logic
families. The outputs provide sufficient drive current to directly
drive transmission lines terminated in 50 Ω to −2 V. A latch
input, which is included, permits tracking, track-and-hold, or
sample-and-hold modes of operation. The latch input pins
contain internal pull-ups that set the latch in tracking mode
when left open.
A differential input stage permits consistent propagation delay
with a wide variety of signals in the common-mode range from
−2.0 V to +3.0 V. Outputs are complementary digital signals
The ADCMP563/ADCMP564 are specified over the industrial
temperature range (−40°C to +85°C).
Rev. C
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