ADC14155

更新时间： 2024-11-26 04:31:19

品牌	Logo	应用领域
美国国家半导体 - NSC		转换器
页数	文件大小	规格书
19页	723K
描述
14-Bit, 155 MSPS, 1.1 GHz Bandwidth A/D Converter

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ADC14155 数据手册

PRELIMINARY

May 2006

ADC14155

14-Bit, 155 MSPS, 1.1 GHz Bandwidth A/D Converter

General Description

Features

n 1.1 GHz Full Power Bandwidth

n Internal sample-and-hold circuit

n Low power consumption

The ADC14155 is a high-performance CMOS analog-to-

digital converter capable of converting analog input signals

into 14-bit digital words at rates up to 155 Mega Samples Per

Second (MSPS). This converter uses a differential, pipelined

architecture with digital error correction and an on-chip

sample-and-hold circuit to minimize power consumption and

the external component count, while providing excellent dy-

namic performance. A unique sample-and-hold stage yields

a full-power bandwidth of 1.1 GHz. The ADC14155 operates

from dual +3.3V and +1.8V power supplies and consumes

974 mW of power at 155 MSPS.

n Internal precision 1.0V reference

n Single-ended or Differential clock modes

n Data Ready output clock

n Clock Duty Cycle Stabilizer

n Dual +3.3V and +1.8V supply operation (+/- 10%)

n Power-down mode

n Offset binary or 2’s complement output data format

n 48-pin LLP package, (7x7x0.8mm, 0.5mm pin-pitch)

The separate +1.8V supply for the digital output interface

allows lower power operation with reduced noise. A power-

down feature reduces the power consumption to 5 mW with

the clock input disabled, while still allowing fast wake-up time

to full operation.

Key Specifications

n Resolution

14 Bits

n Conversion Rate

155 MSPS

71.4 dBFS (typ)

85.3 dBFS (typ)

11.5 bits (typ)

1.1 GHz (typ)

974 mW (typ)

The differential inputs provide a full scale differential input

swing equal to 2 times the reference voltage. A stable 1.0V

internal voltage reference is provided, or the ADC14155 can

be operated with an external reference.

n SNR (f_IN= 70 MHz)

n SFDR (f_IN= 70 MHz)

n ENOB (f_IN= 70 MHz)

n Full Power Bandwidth

n Power Consumption

For optimum performance, it is recommended to operate the

ADC14155 with a differential clock input, which doubles the

clock amplitude compared with single-ended clock opera-

tion. Clock mode (differential versus single-ended) and out-

put data format (offset binary versus 2’s complement) are

pin-selectable. A duty cycle stabilizer maintains performance

over a wide range of clock duty cycles.

Applications

n High IF Sampling Receivers

n Wireless Base Station Receivers

n Power Amplifier Linearization

n Multi-carrier, Multi-mode Receivers

n Test and Measurement Equipment

n Communications Instrumentation

n Radar Systems

The ADC14155 is available in a 48-lead LLP package and

operates over the industrial temperature range of −40˚C to

+85˚C.

DS201790

www.national.com

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与ADC14155相关器件

型号	品牌	获取价格	描述	数据表
ADC14155_07	NSC	获取价格	14-Bit, 155 MSPS, 1.1 GHz Bandwidth A/D Converter
ADC14155CISQ	NSC	获取价格	14-Bit, 155 MSPS, 1.1 GHz Bandwidth A/D Converter
ADC14155CISQ/NOPB	TI	获取价格	155 MSPS, 1.1 GHz Bandwidth A/D Converter
ADC14155CISQE	TI	获取价格	暂无描述
ADC14155EB	NSC	获取价格	14-Bit, 155 MSPS, 1.1 GHz Bandwidth A/D Converter
ADC14155QML	NSC	获取价格	14-Bit, 155 MSPS, 1.1 GHz Bandwidth A/D Converter
ADC14155QML-SP	TI	获取价格	耐辐射加固保障 (RHA)、QMLV、300krad、陶瓷、14 位、单通道、155MSP
ADC14155W-MLS	NSC	获取价格	14-Bit, 155 MSPS, 1.1 GHz Bandwidth A/D Converter
ADC14155W-MLS	TI	获取价格	耐辐射加固保障 (RHA)、QMLV、300krad、陶瓷、14 位、单通道、155MSP
ADC14155W-MPR	TI	获取价格	耐辐射加固保障 (RHA)、QMLV、300krad、陶瓷、14 位、单通道、155MSP

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