Datasheet > ADC1415S

ADC1415S

更新时间： 2024-11-26 06:36:19

品牌	Logo	应用领域
恩智浦 - NXP		双倍数据速率
页数	文件大小	规格书
39页	277K
描述
Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps with input buffer; CMOS or LVDS DDR digital outputs

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

ADC1415S 数据手册

ADC1415S series

Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps

with input buffer; CMOS or LVDS DDR digital outputs

Rev. 03 — 12 April 2010

Preliminary data sheet

1. General description

The ADC1415S is a single channel 14-bit Analog-to-Digital Converter (ADC) optimized for

high dynamic performances and low power consumption at sample rates up to 125 Msps.

Pipelined architecture and output error correction ensure the ADC1415S is accurate

enough to guarantee zero missing codes over the entire operating range. Supplied from a

single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode,

thanks to a separate digital output supply.

The ADC1415S supports the Low Voltage Differential Signalling (LVDS) Double Data

Rate (DDR) output standard. An integrated Serial Peripheral Interface (SPI) allows the

user to easily configure the ADC.

The device also includes a SPI programmable full-scale to allow flexible input voltage

range from 1 V to 2 V (peak-to-peak). With excellent dynamic performance from the

baseband to input frequencies of 170 MHz or more, the ADC1415S is ideal for use in

communications, imaging and medical applications - especially in high Intermediate

Frequency (IF) applications thanks to the integrated input buffer. The input buffer ensures

that the input impedance remains constant and low and the performance consistent over

a wide frequency range.

2. Features and benefits

SNR, 72 dBFS / SFDR, 86 dBc

Input bandwidth, 600 MHz

Power dissipation, 635 mW at 80 Msps,

including analog input buffer

SPI

Sample rate up to 125 Msps

14-bit pipelined ADC core

Clock input divider by 2 for less jitter

contribution

Duty cycle stabilizer

Integrated input buffer

Fast OuT of Range (OTR) detection

Flexible input voltage range: 1 V (p-p) to INL ±1.5 LSB, DNL ±0.5 LSB

2 V (p-p)

CMOS or LVDS DDR digital outputs

Offset binary, two’s complement, gray

code

Pin compatible with the ADC1215S

series, ADC1015S series and the

ADC1115S125

Power-down and Sleep modes

HVQFN40 package

12 3 4 5 6 7...39

中文翻译

下载PDF

与ADC1415S相关器件

型号	品牌	获取价格	描述	数据表
ADC1415S_10	NXP	获取价格	Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Mspswith input buffer; CMOS or LVDS D
ADC1415S065	NXP	获取价格	Single 14-bit ADC 65, 80, 105 or 125 Msps with Input Buffer CMOS or LVDS DDR digital outpu
ADC1415S065HN	NXP	获取价格	Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Mspswith input buffer; CMOS or LVDS D
ADC1415S065HN/C1	NXP	获取价格	Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps with input buffer; CMOS or LVDS
ADC1415S065HN/C1,5	NXP	获取价格	IC IC,A/D CONVERTER,SINGLE,14-BIT,LLCC,40PIN, Analog to Digital Converter
ADC1415S065HN-C1	IDT	获取价格	Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps with input buffer; CMOS or LVDS
ADC1415S080	NXP	获取价格	Single 14-bit ADC 65, 80, 105 or 125 Msps with Input Buffer CMOS or LVDS DDR digital outpu
ADC1415S080HN	NXP	获取价格	Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Mspswith input buffer; CMOS or LVDS D
ADC1415S080HN/C1	NXP	获取价格	Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps with input buffer; CMOS or LVDS
ADC1415S080HN/C1,5	NXP	获取价格	IC IC,A/D CONVERTER,SINGLE,14-BIT,LLCC,40PIN, Analog to Digital Converter

与ADC1415S相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

45
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

34
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

62
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

59

产品中心

服务支持

精选活动

关于我们

帮助中心

ADC1415S

ADC1415S 数据手册

与ADC1415S相关器件

与ADC1415S相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

ADC1415S

ADC1415S 数据手册

与ADC1415S相关器件

与ADC1415S相关文章

您还可以找

您在本页遇到什么问题？