Datasheet > ADC1415S125HN

ADC1415S125HN

更新时间： 2024-11-26 08:18:47

品牌	Logo	应用领域
恩智浦 - NXP		双倍数据速率
页数	文件大小	规格书
42页	293K
描述
Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Mspswith input buffer; CMOS or LVDS DDR digital outputs

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ADC1415S125HN 数据手册

ADC1415S series

Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps

with input buffer; CMOS or LVDS DDR digital outputs

Rev. 4 — 17 December 2010

Product data sheet

1. General description

The ADC1415S is a single channel 14-bit Analog-to-Digital Converter (ADC) optimized for

high dynamic performance and low power consumption at sample rates up to 125 Msps.

Pipelined architecture and output error correction ensure the ADC1415S is accurate

enough to guarantee zero missing codes over the entire operating range. Supplied from a

single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode,

thanks to a separate digital output supply.

The ADC1415S supports the Low Voltage Differential Signalling (LVDS) Double Data

Rate (DDR) output standard. An integrated Serial Peripheral Interface (SPI) allows the

user to easily configure the ADC.

The device also includes a SPI programmable full-scale to allow flexible input voltage

range from 1 V to 2 V (peak-to-peak). With excellent dynamic performance from the

baseband to input frequencies of 170 MHz or more, the ADC1415S is ideal for use in

communications, imaging and medical applications - especially in high Intermediate

Frequency (IF) applications thanks to the integrated input buffer. The input buffer ensures

that the input impedance remains constant and low and the performance consistent over

a wide frequency range.

2. Features and benefits

SNR, 72 dBFS; SFDR, 86 dBc

Input bandwidth, 600 MHz

Power dissipation, 635 mW at 80 Msps,

including analog input buffer

Sample rate up to 125 Msps

14-bit pipelined ADC core

Clock input divided by 2 for less jitter

contribution

Serial Peripheral Interface (SPI)

Duty cycle stabilizer

Integrated input buffer

Fast OuT-of-Range (OTR) detection

Flexible input voltage range: 1 V (p-p) to Offset binary, two’s complement, gray

2 V (p-p)

code

CMOS or LVDS DDR digital outputs

Power-down mode and Sleep mode

Pin compatible with ADC1215S series, HVQFN40 package

ADC1015S series and the

ADC1115S125

12 3 4 5 6 7...42

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与ADC1415S125HN相关器件

型号	品牌	获取价格	描述	数据表
ADC1415S125HN,551	NXP	获取价格	IC,A/D CONVERTER,SINGLE,14-BIT,LLCC,40PIN
ADC1415S125HN/C1	NXP	获取价格	Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps with input buffer; CMOS or LVDS
ADC1415S125HN/C1,5	IDT	获取价格	IC IC,A/D CONVERTER,SINGLE,14-BIT,LLCC,40PIN, Analog to Digital Converter
ADC1415S125HN-C1	IDT	获取价格	Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps with input buffer; CMOS or LVDS
ADC14161	NSC	获取价格	Low-Distortion, Self-Calibrating 14-Bit, 2.5 MSPS, 390 mW A/D Converter
ADC14161CIMDC	TI	获取价格	IC,A/D CONVERTER,SINGLE,14-BIT,CMOS,DIE
ADC14161CIMWC	TI	获取价格	IC,A/D CONVERTER,SINGLE,14-BIT,CMOS,DIE
ADC14161CIVT	NSC	获取价格	Low-Distortion, Self-Calibrating 14-Bit, 2.5 MSPS, 390 mW A/D Converter
ADC141S626	NSC	获取价格	14-Bit, 50 kSPS to 250 kSPS, Differential Input, Micro Power A/D Converter
ADC141S626	TI	获取价格	14 位、50kSPS 至 250kSPS、差分输入、微功耗 ADC

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