ADC1443D160HD

更新时间： 2024-11-26 12:21:47

品牌	Logo	应用领域
艾迪悌 - IDT		转换器模数转换器
页数	文件大小	规格书
49页	1428K
描述
Dual channel 14-bit ADC; 125, 160 or 200 Msps; JESD204B serial outputs

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ADC1443D160HD 技术参数

生命周期：	Obsolete	包装说明：	HQCCN, LCC56,.31SQ,20
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.72	Is Samacsys：	N
最大模拟输入电压：	2 V	最小模拟输入电压：	-2 V
转换器类型：	ADC, PROPRIETARY METHOD	JESD-30 代码：	S-PQCC-N56
长度：	8 mm	最大线性误差 (EL)：	0.031738281%
模拟输入通道数量：	2	位数：	14
功能数量：	1	端子数量：	56
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出位码：	OFFSET BINARY	输出格式：	SERIAL
封装主体材料：	PLASTIC/EPOXY	封装代码：	HQCCN
封装等效代码：	LCC56,.31SQ,20	封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG	采样速率：	160 MHz
采样并保持/跟踪并保持：	SAMPLE	座面最大高度：	1.4 mm
最大压摆率：	391 mA	标称供电电压：	1.8 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	宽度：	8 mm
Base Number Matches：	1

ADC1443D160HD 数据手册

ADC1443D series

Dual channel 14-bit ADC; 125, 160 or 200 Msps; JESD204B

serial outputs

Rev. 03 — 19 July 2012

Objective data sheet

1. General description

The ADC1443D is a dual channel 14-bit Analog-to-Digital Converter (ADC) with

JESD204B interface (backward compatible JESD204A) optimized for high dynamic

performance and low power consumption at sample rates up to 200 Msps. Pipelined

architecture and output error correction ensure that the ADC1443D is accurate enough to

guarantee zero missing codes over the entire operating range.

Supplied from a single 1.8 V source, the ADC1443D has serial outputs compliant with the

JESD204B standard over a configurable number of lanes (1 or 2). Multiple Device

Synchronization (MDS) allows sample-accurate synchronization of the data outputs of

multiple ADC devices. It guarantees a maximum skew of one clock period between as

many as 16 output lanes from up to eight ADC1443D devices.

An integrated Serial Peripheral Interface (SPI) allows easy configuration of the ADC. The

device also includes a programmable full-scale to allow a flexible input voltage range of

1 V (p-p) to 2 V (p-p).

With excellent dynamic performance from the baseband to input frequencies of up to

1 GHz (typical), the ADC1443D is ideal for use in undersampled multi-carrier,

multistandard communication system applications. Using a pipelined architecture, an

output error correction scheme ensures that the ADC1443D is accurate enough to

guarantee zero missing codes over the entire operating range.

The ADC1443D is available in an HLQFN56 package (8 mm  8 mm outline). It is

supported with customer demo boards. This device is also available in a 12-bit resolution

variant with a choice of maximum sampling frequency (125, 160 or 200 Msps).

2. Features and benefits

 Dual channel 14-bit resolution ADC

 Sampling rate up to 200 Msps

 SNR = 70.6 dBFS (typical);

f_s= 154 Msps; f_i= 190 MHz

 SFDR = 86 dBc (typical); f_s= 154 Msps;

f_i= 190 MHz

 JESD204B Device Subclass 0, 1 and 2  IMD3 = 88 dBc (typical); f_s= 154 Msps;

compliant with harmonic clocking and

deterministic latency support

f_i1= 188.5 MHz; f_i2= 191.5 MHz

 ADC Multiple Device Synchronization

 Typical power dissipation = 0.9 W;

(MDS)

f_s= 154 Msps

 Assured interworking/interoperability

with Altera, Lattice and Xilinx SerDes

FPGAs

 Analog input bandwidth of 1 GHz

(typical)

12 3 4 5 6 7...49

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与ADC1443D160HD相关器件

型号	品牌	获取价格	描述	数据表
ADC1443D200HD	IDT	获取价格	Dual channel 14-bit ADC; 125, 160 or 200 Msps; JESD204B serial outputs
ADC144EUQ	DIODES	获取价格	Dual NPN, 50V, 0.1A, SOT363
ADC144EUQ-13	DIODES	获取价格	Small Signal Bipolar Transistor,
ADC14C065	NSC	获取价格	14-Bit, 65/80/95/105 MSPS A/D Converter
ADC14C065CISQ	NSC	获取价格	14-Bit, 65/80/95/105 MSPS A/D Converter
ADC14C080	NSC	获取价格	14-Bit, 65/80/95/105 MSPS A/D Converter
ADC14C080	TI	获取价格	14 位、80MSPS、1.0GHz 输入带宽模数转换器 (ADC)
ADC14C080CISQ	NSC	获取价格	14-Bit, 65/80/95/105 MSPS A/D Converter
ADC14C080CISQ/NOPB	TI	获取价格	1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QCC32, GREEN, WQFN-32
ADC14C080CISQE	NSC	获取价格	IC 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QCC32, 5 X 5 MM, 0.80 MM HEIGHT, 0

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