Datasheet > ADC14C065CISQ

ADC14C065CISQ

更新时间： 2024-11-26 04:10:19

品牌	Logo	应用领域
美国国家半导体 - NSC		转换器
页数	文件大小	规格书
17页	615K
描述
14-Bit, 65/80/95/105 MSPS A/D Converter

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ADC14C065CISQ 数据手册

ADVANCE INFORMATION

September 2006

ADC14C065/ADC14C080/ADC14C095/ADC14C105

14-Bit, 65/80/95/105 MSPS A/D Converter

General Description

NOTE: This is Advance Information for products cur-

rently in development. ALL specifications are design

targets and are subject to change.

Features

n 1 GHz Full Power Bandwidth

n Internal sample-and-hold circuit

n Low power consumption

The ADC14C065, ADC14C080, ADC14C095, and

ADC14105 are high-performance CMOS analog-to-digital

converters capable of converting analog input signals into

14-bit digital words at rates up to 65/80/95/105 Mega

Samples Per Second (MSPS) respectively. These convert-

ers use a differential, pipelined architecture with digital error

correction and an on-chip sample-and-hold circuit to mini-

mize power consumption and the external component count,

while providing excellent dynamic performance. A unique

n Internal precision reference

n Data Ready output clock

n Clock Duty Cycle Stabilizer

n Single +3.3V supply operation

n Power-down mode

n Offset binary or 2’s complement output data format

n 32-pin LLP package, (5x5x0.8mm, 0.5mm pin-pitch)

sample-and-hold stage yields a full-power bandwidth of 1 Key Specifications

GHz. The ADC14C065/080/095/105 may be operated from a

single +3.3V power supply and consumes low power.

n For ADC14C105

n Resolution

14 Bits

105 MSPS

72 dBFS (typ)

83 dBFS (typ)

1 GHz (typ)

A separate +2.5V supply may be used for the digital output

interface which allows lower power operation with reduced

noise. A power-down feature reduces the power consump-

tion to very low levels while still allowing fast wake-up time to

full operation. The differential inputs provide a 2V full scale

differential input swing. A stable 1.2V internal voltage refer-

ence is provided, or the ADC14C065/080/095/105 can be

n Conversion Rate

n SNR (f_IN= 240 MHz)

n SFDR (f_IN= 240 MHz)

n Full Power Bandwidth

n Power Consumption

400 mW (typ)

operated with an external 1.2V reference. Output data for- Applications

mat (offset binary versus 2’s complement) and duty cycle

stabilizer are pin-selectable. The duty cycle stabilizer main-

tains performance over a wide range of clock duty cycles.

n High IF Sampling Receivers

n Wireless Base Station Receivers

n Test and Measurement Equipment

n Communications Instrumentation

n Portable Instrumentation

The ADC14C065/080/095/105 is available in a 32-lead LLP

package and operates over the industrial temperature range

of −40˚C to +85˚C.

Connection Diagram

20209801

DS202098

www.national.com

12 3 4 5 6 7...17

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与ADC14C065CISQ相关器件

型号	品牌	获取价格	描述	数据表
ADC14C080	NSC	获取价格	14-Bit, 65/80/95/105 MSPS A/D Converter
ADC14C080	TI	获取价格	14 位、80MSPS、1.0GHz 输入带宽模数转换器 (ADC)
ADC14C080CISQ	NSC	获取价格	14-Bit, 65/80/95/105 MSPS A/D Converter
ADC14C080CISQ/NOPB	TI	获取价格	1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QCC32, GREEN, WQFN-32
ADC14C080CISQE	NSC	获取价格	IC 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QCC32, 5 X 5 MM, 0.80 MM HEIGHT, 0
ADC14C080CISQE/NOPB	TI	获取价格	14 位、80MSPS、1.0GHz 输入带宽模数转换器 (ADC) \| RTV \| 32
ADC14C095	NSC	获取价格	14-Bit, 65/80/95/105 MSPS A/D Converter
ADC14C095CISQ	NSC	获取价格	14-Bit, 65/80/95/105 MSPS A/D Converter
ADC14C105	NSC	获取价格	14-Bit, 65/80/95/105 MSPS A/D Converter
ADC14C105	TI	获取价格	14 位、105MSPS、1.0GHz 输入带宽模数转换器 (ADC)

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