Datasheet > AD9253TCPZ-125EP

AD9253TCPZ-125EP

更新时间： 2024-10-28 19:54:23

品牌	Logo	应用领域
亚德诺 - ADI		转换器
页数	文件大小	规格书
12页	136K
描述
Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS Serial LVDS 1.8 V Analog-to-Digital Converter

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AD9253TCPZ-125EP 数据手册

Quad, 14-Bit, 125 MSPS Serial LVDS 1.8 V

Analog-to-Digital Converter

Preliminary Technical Data

AD9253-EP

FEATURES

FUNCTIONAL BLOCK DIAGRAM

AVDD

PDWN

DRVDD

1.8 V supply operation

Military temperature range (−55°C to +125°C)

Controlled manufacturing baseline

Qualification data available on request

Low power: 110 mW per channel at 125 MSPS

SNR = 74 dB (to Nyquist)

D0+A

D0–A

SERIAL

LVDS

VIN+A

VIN–A

DIGITAL

PIPELINE

ADC

SERIALIZER

D1+A

D1–A

SERIAL

LVDS

VIN+B

DIGITAL

SERIALIZER

PIPELINE

ADC

D0+B

D0–B

SERIAL

LVDS

VIN–B

RBIAS

VREF

SERIAL

LVDS

D1+B

D1–B

SFDR = 90 dBc (to Nyquist)

SENSE

FCO+

FCO–

D0+C

D0–C

D1+C

D1–C

AD9253-EP

DNL = 0.8 LSB (typical); INL = 2.0 LSB (typical)

Serial LVDS (ANSI-644, default) and low power, reduced signal

option (similar to IEEE 1596.3)

650 MHz full power analog bandwidth

2 V p-p input voltage range

Serial port control

Full chip and individual channel power-down modes

Flexible bit orientation

REF

SELECT

SERIAL

LVDS

AGND

VIN+C

VIN–C

DIGITAL

SERIALIZER

PIPELINE

ADC

SERIAL

LVDS

D0+D

D0–D

SERIAL

LVDS

VIN+D

VIN–D

DIGITAL

SERIALIZER

PIPELINE

ADC

D1+D

D1–D

DCO+

DCO–

SERIAL

LVDS

SERIAL PORT

INTERFACE

CLOCK

MANAGEMENT

VCM

Built-in and custom digital test pattern generation

Multichip sync and clock divider

Programmable output clock and data alignment

Programmable output resolution

Standby mode

Figure 1.

designed to maximize flexibility and minimize system cost, such as

programmable output clock and data alignment and digital test

pattern generation. The available digital test patterns include

built-in deterministic and pseudorandom patterns, along with

custom user-defined test patterns entered via the serial port

interface (SPI).

APPLICATIONS

Medical ultrasound

High speed imaging

Quadrature radio receivers

Diversity radio receivers

Test equipment

The AD9253-EP is available in a RoHS-compliant, 48-lead LFCSP

and is specified over an extended temperature range of −55°C to

+125°C. This product is protected by a U.S. patent. Additional

application and technical information can be found in the AD9253

data sheet.

GENERAL DESCRIPTION

The AD9253-EP is a quad, 14-bit, 125 MSPS analog-to-digital

converter (ADC) with an on-chip, sample-and-hold circuit

designed for low cost, low power, small size, and ease of use.

The product operates at a conversion rate of up to 125 MSPS

and is optimized for outstanding dynamic performance and

low power in applications where a small package size is critical.

PRODUCT HIGHLIGHTS

1. Small Footprint. Four ADCs are contained in a small, space-

saving package.

2. Low power of 110 mW/channel at 125 MSPS with scalable

power options.

3. Ease of Use. A DCO operates at frequencies of up to 500 MHz

and supports double data rate (DDR) operation.

4. User Flexibility. The SPI control offers a wide range of

flexible features to meet specific system requirements.

The ADC requires a single 1.8 V power supply and LVPECL-/

CMOS-/LVDS-compatible sample rate clock for full performance

operation. No external reference or driver components are required

for many applications.

The ADC automatically multiplies the sample rate clock for the

appropriate LVDS serial data rate. A data clock output (DCO) for

capturing data on the output and a frame clock output (FCO)

for signaling a new output byte are provided. Individual channel

power-down is supported and typically consumes less than 2 mW

when all channels are disabled. The ADC contains several features

Rev. PrA

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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AD9253TCPZ-125EP 替代型号

型号	品牌	替代类型	描述	数据表
AD9253TCPZR7-125EP	ADI	完全替代	Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS Serial LVDS 1.8 V Analog-to-Digital Converter
AD9253BCPZ-125	ADI	功能相似	Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS
AD9253BCPZ-80	ADI	功能相似	Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS

与AD9253TCPZ-125EP相关器件

型号	品牌	获取价格	描述	数据表
AD9253TCPZR7-125EP	ADI	获取价格	Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS Serial LVDS 1.8 V Analog-to-Digital Converter
AD9254	ADI	获取价格	14-Bit, 150 MSPS, 1.8 V Analog-to-Digital Converter
AD9254_17	ADI	获取价格	Analog-to-Digital Converter
AD9254-150EBZ	ADI	获取价格	Analog-to-Digital Converter
AD9254-150EBZ1	ADI	获取价格	14-Bit, 150 MSPS, 1.8 V Analog-to-Digital Converter
AD9254BCPZ-150	ADI	获取价格	14-Bit, 150 MSPS, 1.8 V Analog-to-Digital Converter
AD9254BCPZ-150	ROCHESTER	获取价格	1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QCC48, 7 X 7 MM, LEAD FREE, MO-220VKK
AD9254BCPZ-1501	ADI	获取价格	14-Bit, 150 MSPS, 1.8 V Analog-to-Digital Converter
AD9254BCPZRL7-150	ADI	获取价格	14-Bit, 150 MSPS, 1.8 V Analog-to-Digital Converter
AD9254BCPZRL7-1501	ADI	获取价格	14-Bit, 150 MSPS, 1.8 V Analog-to-Digital Converter

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