Datasheet > AD9252BCPZRL7-50

AD9252BCPZRL7-50

更新时间： 2024-10-28 03:49:59

品牌	Logo	应用领域
亚德诺 - ADI		转换器
页数	文件大小	规格书
52页	2314K
描述
Octal, 14-Bit, 50 MSPS Serial LVDS 1.8 V A/D Converter

阅读下载

中文翻译

获取价格

数据手册
替代型号

如果您发现信息不准确，欢迎纠错

AD9252BCPZRL7-50 数据手册

Octal, 14-Bit, 50 MSPS

Serial LVDS 1.8 V A/D Converter

AD9252

FEATURES

FUNCTIONAL BLOCK DIAGRAM

AVDD

PDWN

DRVDD

DRGND

8 ADCs integrated into 1 package

93.5 mW ADC power per channel at 50 MSPS

SNR = 73 dB (to Nyquist)

Excellent linearity

DNL = 0.4 LSB (typical)

AD9252

VIN+A

VIN–A

D+A

D–A

SERIAL

LVDS

ADC

VIN+B

VIN–B

D+B

D–B

SERIAL

LVDS

INL = 1.5 LSB (typical)

Serial LVDS (ANSI-644, default)

Low power reduced signal option, IEEE 1596.3 similar

Data and frame clock outputs

325 MHz, full power analog bandwidth

2 V p-p input voltage range

VIN+C

VIN–C

D+C

D–C

SERIAL

LVDS

ADC

VIN+D

VIN–D

D+D

D–D

SERIAL

LVDS

ADC

VIN+E

VIN–E

SERIAL

LVDS

D+E

D–E

1.8 V supply operation

Serial port control

Full-chip and individual-channel power-down modes

Flexible bit orientation

Built-in and custom digital test pattern generation

Programmable clock and data alignment

Programmable output resolution

Standby mode

VIN+F

VIN–F

D+F

D–F

SERIAL

LVDS

VIN+G

VIN–G

D+G

D–G

SERIAL

LVDS

ADC

VIN+H

VIN–H

D+H

D–H

SERIAL

LVDS

VREF

APPLICATIONS

FCO+

FCO–

SENSE

Medical imaging and nondestructive ultrasound

Portable ultrasound and digital beam forming systems

Quadrature radio receivers

Diversity radio receivers

0.5V

DATA RATE

MULTIPLIER

REFT

REFB

REF

SELECT

SERIAL PORT

INTERFACE

DCO+

DCO–

SCLK/

DTP

RBIAS AGND CSB SDIO/

ODM

CLK+

CLK–

Tape drives

Optical networking

Test equipment

Figure 1.

The ADC contains several features designed to maximize

GENERAL DESCRIPTION

flexibility and minimize system cost, such as programmable

clock and data alignment and programmable digital test pattern

generation. The available digital test patterns include built-in

deterministic and pseudorandom patterns, along with custom user-

defined test patterns entered via the serial port interface (SPI®).

The AD9252 is an octal, 14-bit, 50 MSPS analog-to-digital

converter (ADC) with an on-chip sample-and-hold circuit that

is designed for low cost, low power, small size, and ease of use.

The product operates at a conversion rate of up to 50 MSPS and

is optimized for outstanding dynamic performance and low

power in applications where a small package size is critical.

The AD9252 is available in a Pb-free, 64-lead LFCSP package. It is

specified over the industrial temperature range of −40°C to +85°C.

The ADC requires a single 1.8 V power supply and LVPECL-/

CMOS-/LVDS-compatible sample rate clock for full performance

operation. No external reference or driver components are

required for many applications.

PRODUCT HIGHLIGHTS

1. Small Footprint. Eight ADCs are contained in a small, space-

saving package; low power of 93.5 mW/channel at 50 MSPS.

2. Ease of Use. A data clock output (DCO) operates up to

300 MHz and supports double data rate operation (DDR).

3. User Flexibility. Serial port interface (SPI) control offers a wide

range of flexible features to meet specific system requirements.

The ADC automatically multiplies the sample rate clock for

the appropriate LVDS serial data rate. A data clock (DCO)

for capturing data on the output and a frame clock (FCO) for

signaling a new output byte are provided. Individual channel

power-down is supported and typically consumes less than

2 mW when all channels are disabled.

4. Pin-Compatible Family. This includes the AD9212 (10-bit),

and AD9222 (12-bit).

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

12 3 4 5 6 7...52

中文翻译

下载PDF

AD9252BCPZRL7-50 替代型号

型号	品牌	替代类型	描述	数据表
AD9252ABCPZ-50	ADI	完全替代	Octal, 14-Bit, 50 MSPS, Serial LVDS, 1.8 V ADC
AD9252BCPZ-50	ADI	完全替代	Octal, 14-Bit, 50 MSPS Serial LVDS 1.8 V A/D Converter

与AD9252BCPZRL7-50相关器件

型号	品牌	获取价格	描述	数据表
AD9253	ADI	获取价格	Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS
AD9253-125EBZ	ADI	获取价格	Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS
AD9253BCPZ-105	ADI	获取价格	Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS
AD9253BCPZ-125	ADI	获取价格	Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS
AD9253BCPZ-80	ADI	获取价格	Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS
AD9253BCPZRL7-105	ADI	获取价格	Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS
AD9253BCPZRL7-125	ADI	获取价格	Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS
AD9253BCPZRL7-80	ADI	获取价格	Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS
AD9253TCPZ-125EP	ADI	获取价格	Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS Serial LVDS 1.8 V Analog-to-Digital Converter
AD9253TCPZR7-125EP	ADI	获取价格	Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS Serial LVDS 1.8 V Analog-to-Digital Converter

与AD9252BCPZRL7-50相关文章

三星深化印度制造布局，供应链本地化进程加速
2024-10-29

12
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

11
纳微科技震撼发布GaNSlim革新氮化镓功率芯片
2024-10-18

38
意法半导体发布第四代SiC技术，助力电动汽车电驱
2024-10-15

46

产品中心

服务支持

精选活动

关于我们

帮助中心

AD9252BCPZRL7-50

AD9252BCPZRL7-50 数据手册

AD9252BCPZRL7-50 替代型号

与AD9252BCPZRL7-50相关器件

与AD9252BCPZRL7-50相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

AD9252BCPZRL7-50

AD9252BCPZRL7-50 数据手册

AD9252BCPZRL7-50 替代型号

与AD9252BCPZRL7-50相关器件

与AD9252BCPZRL7-50相关文章

您还可以找

您在本页遇到什么问题？