10-Bit, 40 MSPS, 3 V, 74 mW
Analog-to-Digital Converter
Automotive Product
AD9203W
FEATURES
FUNCTIONAL BLOCK DIAGRAM
CLK
AVDD
DRVDD
CMOS 10-bit, 40 MSPS sampling analog-to-digital converter
Power dissipation: 74 mW (3 V supply, 40 MSPS)
17 mW (3 V supply, 5 MSPS)
Operation between 2.7 V and 3.6 V supply
Differential nonlinearity: −0.25 LSB
Power-down (standby) mode: 0.65 mW
ENOB: 9.55 at fIN = 20 MHz
CLAMP
AD9203W
STBY
CLAMPIN
AINP
AINN
A/D
SHA
GAIN
SHA
GAIN
3-STATE
A/D
D/A
A/D
D/A
REFTF
REFBF
CORRECTION LOGIC
OUTPUT BUFFERS
Out-of-range indicator
BANDGAP
REFERENCE
OTR
Adjustable on-chip voltage reference
IF undersampling up to fIN = 130 MHz
Input range: 1 V to 2 V p-p differential or single-ended
Adjustable power consumption
VREF
D9 (MSB)
10
+
REFSENSE
–
D0 (LSB)
0.5V
AVSS
PWRCON
DFS
DRVSS
Internal clamp circuit
Qualified for automotive applications
Figure 1.
APPLICATIONS
Automotive
GENERAL DESCRIPTION
The AD9203W is a monolithic low power, single supply, 10-bit,
40 MSPS analog-to-digital converter, with an on-chip voltage
reference. The AD9203W uses a multistage differential pipeline
architecture and guarantees no missing codes over the full
operating temperature range. Its input range may be adjusted
between 1 V and 2 V p-p.
can be used with the most significant bit to determine over- or
underrange.
The AD9203W can operate with a supply range from 2.7 V to
3.6 V, an attractive option for low power operation in high
speed portable applications.
The AD9203W is specified over industrial (−40°C to +85°C)
temperature ranges and is available in a 28-lead TSSOP package.
The AD9203W has an onboard programmable reference. An
external reference can also be chosen to suit the dc accuracy
and temperature drift requirements of an application.
PRODUCT HIGHLIGHTS
1. Low Power. The AD9203W consumes 74 mW on a 3 V
supply operating at 40 MSPS. In standby mode, power is
reduced to 0.65 mW.
2. High Performance. Maintains better than 9.55 ENOB at
40 MSPS input signal from dc to Nyquist.
3. Very Small Package. The AD9203W is available in a
28-lead TSSOP.
4. Programmable Power. The AD9203W power can be
further reduced by using an external resistor at lower
sample rates.
5. Built-In Clamp Function. Allows dc restoration of video
signals.
An external resistor can be used to reduce power consumption
when operating at lower sampling rates. This yields power
savings for users who do not require the maximum sample
rate. This feature is especially useful at sample rates far below
40 MSPS. Excellent performance is still achieved at reduced
power. For example, 9.7 ENOB performance may be realized
with only 17 mW of power, using a 5 MHz clock.
A single clock input is used to control all internal conversion
cycles. The digital output data is presented in straight binary or
twos complementary output format by using the DFS pin. An
out-of-range signal (OTR) indicates an overflow condition that
Rev. 0
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