10-Bit, 40 MSPS, 3 V, 74 mW
A/D Converter
a
AD9203
FUNCTIONAL BLOCK DIAGRAM
FEATURES
CMOS 10-Bit 40 MSPS Sampling A/D Converter
Power Dissipation: 74 mW (3 V Supply, 40 MSPS)
17 mW (3 V Supply, 5 MSPS)
CLK
AVDD
DRVDD
CLAMP
AD9203
STBY
CLAMPIN
Operation Between 2.7 V and 3.6 V Supply
Differential Nonlinearity: ؎0.25 LSB
Power-Down (Standby) Mode, 0.65 mW
ENOB: 9.55 @ fIN = 20 MHz
AINP
AINN
A/D
SHA
GAIN
SHA
GAIN
3 STATE
A/D
D/A
A/D
D/A
REFTF
REFBF
Out-of-Range Indicator
CORRECTION LOGIC
OUTPUT BUFFERS
Adjustable On-Chip Voltage Reference
IF Undersampling up to fIN = 130 MHz
Input Range: 1 V to 2 V p-p Differential or Single-Ended
Adjustable Power Consumption
BANDGAP
REFERENCE
OTR
10
D9 (MSB)
VREF
+
–
REFSENSE
D0 (LSB)
0.5V
Internal Clamp Circuit
AVSS
PWRCON
DFS
DRVSS
APPLICATIONS
CCD Imaging
Video
Portable Instrumentation
IF and Baseband Communications
Cable Modems
Medical Ultrasound
PRODUCT DESCRIPTION
The AD9203 is specified over industrial (–40°C to +85°C)
temperature ranges and is available in a 28-lead TSSOP
package.
The AD9203 is a monolithic low power, single supply, 10-bit,
40 MSPS analog-to-digital converter, with an on-chip voltage
reference. The AD9203 uses a multistage differential pipeline
architecture and guarantees no missing codes over the full oper-
ating temperature range. Its input range may be adjusted be-
tween 1 V and 2 V p-p.
PRODUCT HIGHLIGHTS
Low Power
The AD9203 consumes 74 mW on a 3 V supply operating at
40 MSPS. In standby mode, power is reduced to 0.65 mW.
The AD9203 has an onboard programmable reference. An
external reference can also be chosen to suit the dc accuracy and
temperature drift requirements of an application.
High Performance
Maintains better than 9.55 ENOB at 40 MSPS input signal
from dc to Nyquist.
An external resistor can be used to reduce power consumption
when operating at lower sampling rates. This yields power sav-
ings for users who do not require the maximum sample rate.
This feature is especially useful at sample rates far below 40
MSPS. Excellent performance is still achieved at reduced power.
For example, 9.7 ENOB performance may be realized with only
17 mW of power, using a 5 MHz clock.
Very Small Package
The AD9203 is available in a 28-lead TSSOP.
Programmable Power
The AD9203 power can be further reduced by using an external
resistor at lower sample rates.
Built-In Clamp Function
Allows dc restoration of video signals.
A single clock input is used to control all internal conversion
cycles. The digital output data is presented in straight binary or
twos complementary output format by using the DFS pin. An
out-of-range signal (OTR) indicates an overflow condition that
can be used with the most significant bit to determine over or
under range.
The AD9203 can operate with a supply range from 2.7 V to
3.6 V, attractive for low power operation in high speed por-
table applications.
REV. 0
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© Analog Devices, Inc., 1999