Octal, 12-/16-Bit nanoDAC+ with
2 ppm/°C Reference, SPI Interface
Data Sheet
AD5672R/AD5676R
FEATURES
GENERAL DESCRIPTION
High performance
The AD5672R/AD5676R are low power, octal, 12-/16-bit buffered
voltage output digital-to-analog converters (DACs). They include
a 2.5 V, 2 ppm/°C internal reference (enabled by default) and a
gain select pin giving a full-scale output of 2.5 V (gain = 1) or
5 V (gain = 2). The devices operate from a single 2.7 V to 5.5 V
supply and are guaranteed monotonic by design. The AD5672R/
AD5676R are available in a 20-lead TSSOP and in a 20-lead LFCSP
and incorporate a power-on reset circuit and a RSTSEL pin that
ensures that the DAC outputs power up to zero scale or midscale
and remain there until a valid write. The AD5672R/AD5676R
contain a power-down mode, reducing the current consumption to
1 µA typical while in power-down mode.
High relative accuracy (INL): 3 LSB maximum at 16 bits
Total unadjusted error (TUE): 0.14% of FSR maximum
Offset error: 1.5 mV maximum
Gain error: 0.06% of FSR maximum
Low drift 2.5 V reference: 2 ppm/°C typical
Wide operating ranges
−40°C to +125°C temperature range
2.7 V to 5.5 V power supply range
Easy implementation
User selectable gain of 1 or 2 (GAIN pin/gain bit)
1.8 V logic compatibility
50 MHz SPI with readback or daisy chain
Robust 2 kV HBM and 1.5 kV FICDM ESD rating
20-lead, RoHS-compliant TSSOP and LFCSP
Table 1. Octal nanoDAC+® Devices
Interface
Reference
16-Bit
12-Bit
SPI
Internal
AD5676R
AD5676
AD5675R
AD5672R
Not applicable
AD5671R
APPLICATIONS
Optical transceivers
External
Internal
I2C
Base station power amplifiers
Process control (PLC input/output cards)
Industrial automation
PRODUCT HIGHLIGHTS
1. High Relative Accuracy (INL).
AD5672R (12-bit): 1 LSB maximum.
AD5676R (16-bit): 3 LSB maximum.
2. Low Drift, 2.5 V On-Chip Reference.
Data acquisition systems
FUNCTIONAL BLOCK DIAGRAM
V
V
V
REFOUT
LOGIC
DD
AD5672R/AD5676R
2.5V
REF
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
DAC
STRING
DAC 0
INPUT
V
V
V
V
V
V
V
V
0
1
2
3
4
5
6
7
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
REGISTER
REGISTER
DAC
REGISTER
STRING
DAC 1
INPUT
REGISTER
DAC
REGISTER
STRING
DAC 2
INPUT
REGISTER
SCLK
DAC
REGISTER
STRING
DAC 3
INPUT
REGISTER
SYNC
SDI
DAC
REGISTER
STRING
DAC 4
INPUT
REGISTER
DAC
REGISTER
STRING
DAC 5
INPUT
REGISTER
SDO
DAC
REGISTER
STRING
DAC 6
INPUT
REGISTER
LDAC
DAC
REGISTER
STRING
DAC 7
INPUT
REGISTER
RESET
GAIN POWER-DOWN
POWER-ON
RESET
×1/×2
LOGIC
RSTSEL
GAIN
GND
Figure 1.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2014–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com