Octal, 16-Bit nanoDAC+
with I2C Interface
AD5675
Data Sheet
FEATURES
GENERAL DESCRIPTION
High performance
The AD5675 is a low power, octal, 16-bit buffered voltageoutput
digital-to-analog converter (DAC). The device includes a gain
select pin, giving a full-scale output of VREF (gain = 1) or 2 ×
VREF (gain = 2). The device operates from a single 2.7 V to 5.5 V
supply and is guaranteed monotonic bydesign. The AD5675is
available in 20-lead TSSOP and LFCSP packages. The power-on
reset circuit and a RSTSEL pin ensure that the output DACs power
up to zero scale or midscale and remain there untila valid write
takes place. The AD5675 containsa power-down mode, reducing
the current consumption to 1 µA typical while in power-down
mode. The AD5675 uses a versatile 2-wire serial interface that
operates at clock rates up to 400 kHz, and includes a VLOGIC pin
intended for 1.8 V to 5.5 V logic.
High relative accuracy (INL): 3 LSB maximum at 16 bits
Total unadjusted error (TUE): 0.14% of FSR maximum
Offset error: 1.5 mV maximum
Gain error: 0.06% of FSR maximum
Wide operating ranges
−40°C to +125°C temperature range
2.7 V to 5.5 V power supply
Easy implementation
User selectable gain of 1 or 2 (GAIN pin/bit)
1.8 V logic compatibility
I2C-compatible serial interface
Robust 2 kV HBM and 1.5 kV FICDM ESD rating
20-lead TSSOP and LFCSP RoHS-compliant packages
Table 1. Octal nanoDAC+® Devices
APPLICATIONS
Optical transceivers
Base station power amplifiers
Process control (PLC input/output cards)
Industrial automation
Interface
Reference
Internal
External
Internal
16-Bit
12-Bit
SPI
AD5676R
AD5676
AD5675R
AD5672R
Not applicable
AD5671R
I2C
Data acquisition systems
FUNCTIONAL BLOCK DIAGRAM
V
V
V
REF
LOGIC
DD
AD5675
2.5V
REF
BUFFER
DAC
STRING
DAC 0
INPUT
V
V
V
V
V
V
V
V
0
1
2
3
4
5
6
7
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
REGISTER
REGISTER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
BUFFER
DAC
REGISTER
STRING
DAC 1
INPUT
REGISTER
DAC
REGISTER
STRING
DAC 2
INPUT
REGISTER
SCL
DAC
REGISTER
STRING
DAC 3
INPUT
REGISTER
SDA
A1
DAC
REGISTER
STRING
DAC 4
INPUT
REGISTER
DAC
REGISTER
STRING
DAC 5
INPUT
REGISTER
A0
DAC
REGISTER
STRING
DAC 6
INPUT
REGISTER
LDAC
DAC
REGISTER
STRING
DAC 7
INPUT
REGISTER
RESET
GAIN POWER-DOWN
POWER-ON
RESET
×1/×2
LOGIC
RSTSEL
GAIN
GND
Figure 1.
Rev. B
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