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AD5533 PDF预览

AD5533

更新时间: 2024-11-04 22:38:59
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
16页 224K
描述
32-Channel Infinite Sample-and-Hold

AD5533 数据手册

 浏览型号AD5533的Datasheet PDF文件第2页浏览型号AD5533的Datasheet PDF文件第3页浏览型号AD5533的Datasheet PDF文件第4页浏览型号AD5533的Datasheet PDF文件第5页浏览型号AD5533的Datasheet PDF文件第6页浏览型号AD5533的Datasheet PDF文件第7页 
32-Channel Infinite  
Sample-and-Hold  
a
AD5533*  
GENERAL DESCRIPTION  
FEATURES  
The AD5533 combines a 32-channel voltage translation function  
with an infinite output hold capability. An analog input voltage  
on the common input pin, VIN, is sampled and its digital repre-  
sentation transferred to a chosen DAC register. VOUT for this  
DAC is then updated to reflect the new contents of the DAC  
register. Channel selection is accomplished via the parallel address  
inputs A0–A4 or via the serial input port. The output voltage  
range is determined by the offset voltage at the OFFS_IN pin  
and the gain of the output amplifier. It is restricted to a range  
from VSS + 2 V to VDD – 2 V because of the headroom of the  
output amplifier.  
Infinite Sample-and-Hold Capability to ؎0.018% Accuracy  
High Integration: 32-Channel SHA in 12 
؋
 12 mm2 LFBGA  
Per Channel Acquisition Time of 16 s max  
Adjustable Voltage Output Range  
Output Voltage Span 10 V  
Output Impedance 0.5 ⍀  
Readback Capability  
DSP-/Microcontroller-Compatible Serial Interface  
Parallel Interface  
Temperature Range –40؇C to +85؇C  
APPLICATIONS  
Level Setting  
Instrumentation  
Automatic Test Equipment  
Industrial Control Systems  
Data Acquisition  
The device is operated with AVCC = 5 V 5%, DVCC = 2.7 V to  
5.25 V, VSS = –4.75 V to –16.5 V and VDD = 8 V to 16.5 V and  
requires a stable 3 V reference on REF_IN as well as an offset  
voltage on OFFS_IN.  
PRODUCT HIGHLIGHTS  
1. Infinite Droopless Sample-and-Hold Capability.  
Low Cost I/O  
2. The AD5533 is available in a 74-lead LFBGA package with a  
body size of 12 mm × 12 mm.  
FUNCTIONAL BLOCK DIAGRAM  
DV  
CC  
AV  
OFFS IN  
V
V
SS  
REF IN REF OUT  
CC  
DD  
V
0
OUT  
V
ADC  
DAC  
IN  
TRACK/RESET  
BUSY  
V
31  
OUT  
AD5533  
DAC  
DAC  
DAC GND  
AGND  
OFFS OUT  
DGND  
INTERFACE  
CONTROL  
LOGIC  
SER/PAR  
WR  
ADDRESS INPUT REGISTER  
OFFSET SEL  
A4–A0  
CAL  
SCLK  
D
D
SYNC/CS  
IN  
OUT  
*Protected by U.S. Patent No. 5,969,657; other patents pending.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 2000  

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