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AD5533ABCZ-1

更新时间： 2024-02-18 02:29:31
品牌 Logo 应用领域
亚德诺 - ADI 放大器
页数 文件大小 规格书
16页 312K
描述
IC SAMPLE AND HOLD AMPLIFIER, PBGA74, 12 X 12 MM, LFBGA-74, Sample and Hold Circuit

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AD5533ABCZ-1 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：BGA
包装说明：LBGA,针数：74
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.35
最长采集时间：16 µs放大器类型：SAMPLE AND HOLD CIRCUIT
最大模拟输入电压：3 V最小模拟输入电压：
JESD-30 代码：S-PBGA-B74JESD-609代码：e1
长度：12 mm湿度敏感等级：3
功能数量：1端子数量：74
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：LBGA
封装形状：SQUARE封装形式：GRID ARRAY, LOW PROFILE
峰值回流温度（摄氏度）：260认证状态：Not Qualified
采样并保持/跟踪并保持：SAMPLE座面最大高度：1.7 mm
供电电压上限：7 V标称供电电压 (Vsup)：5 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：TIN SILVER COPPER端子形式：BALL
端子节距：1 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：12 mm
Base Number Matches：1

AD5533ABCZ-1 数据手册

 浏览型号AD5533ABCZ-1的Datasheet PDF文件第2页浏览型号AD5533ABCZ-1的Datasheet PDF文件第3页浏览型号AD5533ABCZ-1的Datasheet PDF文件第4页浏览型号AD5533ABCZ-1的Datasheet PDF文件第5页浏览型号AD5533ABCZ-1的Datasheet PDF文件第6页浏览型号AD5533ABCZ-1的Datasheet PDF文件第7页 
32-Channel Infinite  
Sample-and-Hold  
a
AD5533*  
FEATURES  
GENERAL DESCRIPTION  
Infinite Sample-and-Hold Capability to ؎0.018% Accuracy  
High Integration:  
32-Channel DAC in 12 mm 
؋
 12 mm CSPBGA  
Per Channel Acquisition Time of 16 ␮s Max  
Adjustable Voltage Output Range  
Output Impedance 0.5 ⍀  
Output Voltage Span 10 V  
Readback Capability  
DSP/Microcontroller Compatible Serial Interface  
Parallel Interface  
Temperature Range –40؇C to +85؇C  
The AD5533 combines a 32-channel voltage translation function  
with an infinite output hold capability. An analog input voltage  
on the common input pin, VIN, is sampled and its digital repre-  
sentation transferred to a chosen DAC Register. VOUT for this  
DAC is then updated to reflect the new contents of the DAC  
register. Channel selection is accomplished via the parallel address  
inputs A0–A4 or via the serial input port. The output voltage  
range is determined by the offset voltage at the OFFS_IN pin  
and the gain of the output amplifier. It is restricted to a range  
from VSS + 2 V to VDD – 2 V because of the headroom of the  
output amplifier.  
The device is operated with AVCC = +5 V 5%, DVCC = +2.7 V to  
+5.25 V, VSS = –4.75 V to –16.5 V, and VDD = +8 V to +16.5 V  
and requires a stable 3 V reference on REF_IN as well as an  
offset voltage on OFFS_IN.  
APPLICATIONS  
Optical Networks  
Automatic Test Equipment  
Level Setting  
Instrumentation  
PRODUCT HIGHLIGHTS  
1. Infinite Droopless Sample-and-Hold Capability.  
Industrial Control Systems  
Data Acquisition  
Low Cost I/O  
2. The AD5533 is available in a 74-lead CSPBGA with a body  
size of 12 mm ϫ 12 mm.  
FUNCTIONAL BLOCK DIAGRAM  
DV  
AV  
V
V
SS  
OFFS IN  
REF IN REF OUT  
CC  
CC  
DD  
V
V
0
OUT  
V
ADC  
DAC  
IN  
TRACK/RESET  
BUSY  
DAC GND  
AGND  
31  
OUT  
AD5533  
DAC  
DAC  
OFFS OUT  
DGND  
INTERFACE  
CONTROL  
LOGIC  
SER /PAR  
WR  
ADDRESS INPUT REGISTER  
SCLK  
D
D
A4–A0  
CAL OFFSET SEL  
SYNC/CS  
IN  
OUT  
*Protected by U.S. Patent No. 5,969,657  
.
REV. A  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective companies.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© 2003 Analog Devices, Inc. All rights reserved.  
 
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