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AD5516_03 PDF预览

AD5516_03

更新时间: 2022-05-20 03:03:22
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
16页 228K
描述
16-Channel, 12-Bit Voltage-Output DAC with 14-Bit Increment Mode

AD5516_03 数据手册

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AD5516  
PIN CONFIGURATION  
1
2 3 4 5 6 7 8 9 10 11  
A
B
C
D
E
F
A
B
C
D
E
F
TOP VIEW  
G
H
J
G
H
J
K
L
K
L
1
2 3 4 5 6 7 8 9 10 11  
74-LEAD CSPBGA BALL CONFIGURATION  
CSPBGA Ball CSPBGA Ball CSPBGA Ball  
CSPBGA Ball  
CSPBGA  
Number  
Ball  
Name  
Number  
Name  
Number  
Name  
Number  
Name  
Number  
Name  
K9  
K10  
K11  
L1  
L2  
L3  
L4  
L5  
L6  
L7  
RFB10  
D11  
E1  
E2  
E10  
E11  
F1  
NC  
VOUT  
NC  
AGND1  
PD  
VOUT  
RFB  
AGND2  
RFB14  
H10  
H11  
J1  
J2  
J6  
J10  
J11  
K1  
K2  
K3  
K4  
K5  
K6  
K7  
K8  
VOUT13  
VOUT12  
RFB3  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
A9  
A10  
A11  
B1  
B2  
B3  
B4  
NC  
NC  
B5  
B6  
B7  
B8  
DGND  
DGND  
NC  
NC  
SCLK  
NC  
RFB9  
1
VOUT11  
NC  
RESET  
BUSY  
DGND  
DVCC  
DOUT  
DIN  
SYNC  
NC  
NC  
NC  
NC  
NC  
DCEN  
VOUT  
4
VOUT  
6
B9  
NC  
RFB12  
RFB11  
RFB6  
2
B10  
B11  
C1  
C2  
C6  
C10  
C11  
D1  
D2  
D10  
VOUT  
NC  
7
F2  
1
REF_IN  
F10  
F11  
G1  
VOUT  
0
RFB  
4
VDD2  
DACGND  
NC  
VOUT  
5
VDD1  
RFB2  
RFB  
5
L8  
L9  
L10  
L11  
RFB7  
AVCC  
NC  
1
G2  
RFB15  
VOUT14  
RFB13  
NC  
VSS2  
VSS1  
VOUT  
8
G10  
G11  
H1  
RFB8  
RFB  
DACGND  
AVCC  
0
NC  
VOUT10  
VOUT  
VOUT3  
2
9
H2  
VOUT15  
NC = Not Internally Connected  
PIN FUNCTION DESCRIPTIONS  
Mnemonic  
Function  
AGND (1–2)  
AVCC (1–2)  
Analog GND Pins  
Analog Supply Pins. Voltage range from 4.75 V to 5.25 V.  
VDD Supply Pins. Voltage range from 4.75 V to 15.75 V.  
VSS Supply Pins. Voltage range from –4.75 V to –15.75 V.  
Digital GND Pins  
Digital Supply Pin. Voltage range from 2.7 V to 5.25 V.  
Reference GND Supply for All 16 DACs  
Reference Input Voltage for All 16 DACs. The recommended value of REF_IN is 3 V.  
Analog Output Voltages from the 16 DAC Channels  
Feedback Resistors. For nominal output voltage range, connect each RFB to its corresponding VOUT. Access to  
the feedback resistors enables the user to increase the DAC current drive or generate programmable current  
sources. They should not be used for gain adjustment.  
V
V
DD (1–2)  
SS (1–2)  
DGND  
DVCC  
DACGND  
REF_IN  
V
R
OUT (0–15)  
FB (0–15)  
SYNC  
Active Low Input. This is the frame synchronization signal for the serial interface. While SYNC is low, data is  
transferred in on the falling edge of SCLK.  
–6–  
REV. B  

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