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AD5517ABC-3 PDF预览

AD5517ABC-3

更新时间: 2024-11-25 19:06:15
品牌 Logo 应用领域
亚德诺 - ADI 输入元件转换器
页数 文件大小 规格书
10页 200K
描述
IC SERIAL INPUT LOADING, 14-BIT DAC, PBGA74, 12 X 12 MM, LFBGA-74, Digital to Analog Converter

AD5517ABC-3 数据手册

 浏览型号AD5517ABC-3的Datasheet PDF文件第2页浏览型号AD5517ABC-3的Datasheet PDF文件第3页浏览型号AD5517ABC-3的Datasheet PDF文件第4页浏览型号AD5517ABC-3的Datasheet PDF文件第5页浏览型号AD5517ABC-3的Datasheet PDF文件第6页浏览型号AD5517ABC-3的Datasheet PDF文件第7页 
PRELIMINARY TECHNICAL DATA  
16-Channel 14-Bit  
Voltage-Output DAC  
a
Preliminary Technical Data AD5517-1/AD5517-2/AD5517-3*  
FEATURES  
GE NE RAL D E SC RIP TIO N  
High Integration: 16-channel DAC in 12x12 m m 2 LFBGA  
Guaranteed Monotonic  
T he AD5517 is a 16-channel voltage-output 14-bit DAC. T he  
selected DAC register is written to via the 3-wire serial inter-  
face. DAC selection is accomplished via address bits A3-A0.  
14-bit resolution is achieved by fine adjusment in Mode 2. T he  
serial interface operates at clock rates up to 20 MHz and is  
compatible with standard SPI, MICROWIRE and DSP inter-  
face standards. T he output voltage range is fixed at ±2.5 V  
(AD5517-1), ±5 V (AD5517-2) and ±10 V (AD5517-3). Ac-  
cess to the feedback resistor in each channel is provided via  
Low Pow er, SPITM, MICROWIRETM and DSP-Com patible  
3-Wire Serial Interface  
Output Im pedance 0.5  
Output Voltage Range  
± 2.5 V (AD5517-1)  
± 5 V (AD5517-2)  
± 10V (AD5517-3)  
Asynchronous RESET facility  
Daisy-Chaining Option  
RFB0 to RBF15 pins.  
T he device is operated with AVcc = 5 V ± 5%, DVcc = 2.7 V  
to 5.25 V, VSS = -4.75 V to -12 V and VDD = 4.75 V to 12 V  
and requires a stable 2.5 V reference on REF_IN.  
Tem perature Range -40oC to +85oC  
APPLICATIONS  
Level Setting  
Instrum entation  
P RO D UC T H IGH LIGH TS  
1. 16 14-bit DACs in one package, guaranteed monotonic.  
Autom atic Test Equipm ent  
Optical Netw orks  
Industrial Control System s  
Data Acquisition  
2. T he AD5517 is available in a 74-lead LFBGA package with  
a body size of 12mm by 12mm.  
FUNC TIO NAL BLO C K D IAGRAM  
Low Cost I/ O  
V
SS  
V
DV  
CC  
AV  
CC  
DD  
REF_IN  
V
BIAS  
R
FB  
R
OFFS  
R
0
FB  
AD5517  
-
V
OUT  
0
DAC  
DAC  
+
R
OFFS  
R
FB  
RESET  
BUSY  
R
1
FB  
-
V
OUT  
1
+
ANALOG  
CALIBRATION  
LOOP  
R
OFFS  
R
FB  
R 14  
FB  
DACGND  
AGND  
-
DAC  
DAC  
V
14  
OUT  
+
R
R
OFFS  
FB  
DGND  
R
15  
FB  
-
V
15  
OUT  
INTERFACE  
CONTROL  
LOGIC  
+
DCEN  
MODE2  
POWER-DOWN  
LOGIC  
7-BIT BUS  
SCLK  
D
IN  
D
OUT  
PD  
SYNC  
*Protected by U.S. Patent Nos. 5,684,481 and 5,969,657; other patents pending.  
SP I and Q SP I are T rademarks of Motorola, Inc.  
MICRO WIRE is a T rademark of National Semiconductor Corporation.  
REV. PrA 2/01  
Inform ation furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assum ed by Analog Devices for its  
use, nor for any infringem ents of patents or other rights of third parties  
which m ay result from its use. No license is granted by im plication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.  
Tel: 781/ 329-4700  
Fax: 781/ 326-8703  
World Wide Web Site: http:/ / w w w .analog.com  
© Analog Devices, Inc., 2000  

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