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AD5523JCPZ

更新时间: 2024-11-25 04:04:07
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亚德诺 - ADI /
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45页 550K
描述
Quad Parametric Measurement Unit With Integrated 16-Bit Level Setting DACs

AD5523JCPZ 数据手册

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Quad Parametric Measurement Unit With  
Integrated 16-Bit Level Setting DACs  
AD5522  
Preliminary Technical Data  
FEATURES  
PRODUCT OVERVIEW  
Quad Parametric Measurement Unit  
FV, FI, FN, MV, MI Functions  
4 Programmable Current Ranges (Internal RSENSE  
The AD5522 is a high performance, highly integrated parametric  
measurement unit consisting of four independent channels. Each  
PPMU channel includes five, 16-bit, voltage out DACs setting the  
programmable inputs levels for the force voltage input, clamp and  
comparator inputs (high and low). Five programmable force and  
measure current ranges are available ranging from 5µA to 64mA.  
Four of these ranges use on chip sense resistors, while a high  
current range up to 64mA is available per channel using off chip  
sense resistors. Currents in excess of 64mA require an external  
amplifier. Low capacitance DUT connections (FOH, EXT FOH)  
ensure the device is suited to relay less test systems.  
)
5uA, 20uA, 200uA and 2mA  
1 Programmable Current Range up to 64mA (external RSENSE  
22.5 V FV Range with Asymmetrical Operation  
Integrated 16-Bit DACs Provide Programmable Levels  
Offset and Gain Correction on Chip  
Low Capacitance Outputs Suited to Relay Less Systems  
On-chip Comparators Per Channel  
)
FI Voltage Clamps & FV Current Clamps  
Guard Drive Amplifier  
System PMU connections  
Programmable Temperature Shutdown Feature  
SPI/Microwire/DSP & LVDS Compatible Interfaces  
Compact 80 lead TQFP Package with Exposed Pad (Top Or  
Bottom)  
The PMU functions are controlled via a simple three wire serial  
interface compatible with SPI/QSPI/Microwire and DSP interface  
standards. Interface clocks of 50MHz allow fast updating of modes.  
LVDS (Low Voltage Differential Signaling) interface protocol at  
100MHz is also supported. Comparator outputs are provided per  
channel for device go no-go testing and characterization. Control  
registers provide easy way of changing force or measure conditions,  
DAC levels and selected current ranges. SDO (serial data out)  
allows the user to readback information for diagnostic purposes.  
APPLICATIONS  
Automatic Test Equipment (ATE)  
per pin Parametric Measurement Unit  
Continuity & Leakage Testing  
Device Power Supply  
Instrumentation  
SMU (Source Measure Unit)  
Precision Measurement  
DV  
DGND  
C
(0-3)  
SYS_FORCE  
AV (0-4) AV (0-4)  
SS DD  
SYS_SENSE  
AGND  
CC  
COMP  
EN  
EXTFOH(0-3)  
VREF  
16-Bit  
CLH DAC  
x4  
16  
16  
16  
16  
X1 REG  
M REG  
C REG  
CLH  
SW 3  
C
(0-3)  
FF  
X2 REG  
*2  
REFGND  
*2  
OFFSET DAC  
*6  
INTERNAL RANGE SELECT  
(5uA, 20uA, 200uA, 2mA)  
16  
60Ω  
1kΩ  
FIN  
16  
16  
SW 1  
16-Bit  
16 FIN DAC  
X1 REG  
M REG  
C REG  
+
FOH(0-3)  
X2 REG  
FORCE  
AGNDx  
AMPLIFER  
*6  
SW 5  
-
RSENSE  
SW 2  
SW 6  
SW 7  
SW 4  
16-Bit  
CLL DAC  
16  
16  
16  
16  
EXTMEASIH(0-3)  
EXTMEASIL(0-3)  
CLL  
+
X1 REG  
M REG  
C REG  
X2 REG  
OFFSET DAC  
BIAS TO  
CENTER  
+
-
*2  
SW 8  
EXTERNAL  
RSENSE  
(CURRENTS  
SW 10  
*2  
IRANGE  
10kΩ  
x5 or x10  
UP TO 64mA)  
MEASOUT  
MUX & GAIN  
x1/x0.2  
+
-
-
SW 9  
MEASOUT (0-3)  
AGND (0-3)  
SW 12  
TEMP  
SENSOR  
MEASURE  
CURRENT  
IN AMP  
16  
16  
16  
SW 11  
MEASVH (0-3)  
GUARD (0-3)  
*6  
*6  
+
-
X1 REG  
M REG  
C REG  
16-Bit  
CPH DAC  
16  
X2 REG  
SW 13  
SW 14  
DUT  
AGNDx  
+
SW 16  
GUARD AMP  
x1  
GUARDIN (0-3)/  
DUTGND (0-3)  
16  
16  
16  
DUTGND  
CPH  
+
-
-
*6  
*6  
CPL  
16-Bit  
CPL DAC  
X1 REG  
M REG  
C REG  
16  
DUTGND  
MEASURE  
VOLTAGE  
IN AMP  
X2 REG  
-
+
-
+
SW 15  
COMPARATOR  
10kΩ  
AGNDx  
16-Bit  
OFFSET  
DAC  
TO ALL DAC  
OUTPUT  
AMPLIFIERS  
16  
TEMP  
SENSOR  
TO  
MEASOUT  
MUX  
TMPALM  
16  
SERIAL  
INTERFACE  
CLAMP &  
GUARD  
ALARM  
POWER ON  
RESET  
CGALM  
CPOH2  
/CPO1  
CPOH3  
/CPO3  
CPOL2  
/CPO0  
CPOL3  
/CPO2  
CPOH0/  
SDI  
CPOL0/  
SCLK  
CPOL1/  
SYNC  
CPOH1/  
SDO  
LVDS/  
SPI  
SDO  
SDI  
RESET  
SCLK  
SYNC BUSY  
LOAD  
Figure 1. Functional Block Diagram  
Rev.PrL  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2006 Analog Devices, Inc. All rights reserved.  

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