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AD5373BSTZ

更新时间： 2024-11-23 04:30:39
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亚德诺 - ADI /
页数 文件大小 规格书
25页 301K
描述
32-Channel, 16/14, Serial Input, Voltage-Output DACs

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AD5373BSTZ 数据手册

 浏览型号AD5373BSTZ的Datasheet PDF文件第2页浏览型号AD5373BSTZ的Datasheet PDF文件第3页浏览型号AD5373BSTZ的Datasheet PDF文件第4页浏览型号AD5373BSTZ的Datasheet PDF文件第5页浏览型号AD5373BSTZ的Datasheet PDF文件第6页浏览型号AD5373BSTZ的Datasheet PDF文件第7页 
32-Channel, 16/14, Serial Input,  
Voltage-Output DACs  
Preliminary Technical Data  
AD5372/AD5373  
Power-on reset  
Digital reset (RESET)  
FEATURES  
32-channel DAC in 56-LFCSP and 64-LQFP  
AD5372 Guaranteed monotonic to 16 bits  
AD5373 Guaranteed monotonic to 14 bits  
Maximum output voltage span of 4 × VREF (20 V)  
Nominal output voltage range of -4 V to +8 V  
Multiple, independent output spans available  
System calibration function allowing user-programmable  
offset and gain  
Channel grouping and addressing features  
Thermal Monitoring Function  
Clear function to user-defined SIGGND (CLR pin)  
Simultaneous update of DAC outputs (LDAC pin)  
APPLICATIONS  
Level setting in automatic test equipment (ATE)  
Variable optical attenuators (VOA)  
Optical switches  
Industrial control systems  
Instrumentation  
DSP/microcontroller-compatible serial interface  
2.5 V to 5.5 V JEDEC-compliant digital levels  
FUNCTIONAL BLOCK DIAGRAM  
DV  
V
V
SS  
AGND DNGD  
CC  
DD  
LDAC  
VREF0  
n = 16 FOR AD5372  
n = 14 FOR AD5373  
GROUP 0  
BUFFER  
n
CONTROL  
REGISTER  
14  
n
n
n
OFFSET  
DAC 0  
OFS0  
REGISTER  
8
8
A/B SELECT  
REGISTER  
TO  
MUX 2's  
BUFFER  
OUTPUT BUFFER  
AND POWER  
DOWN CONTROL  
VOUT0  
VOUT1  
VOUT2  
VOUT3  
VOUT4  
VOUT5  
VOUT6  
VOUT7  
n
n
n
X2A REGISTER  
DAC 0  
REGISTER  
n
MUX  
2
A/B  
DAC 0  
X1 REGISTER  
MUX  
X2B REGISTER  
n
n
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
M REGISTER  
C REGISTER  
·
·
·
·
·
·
·
·
·
·
·
·
n
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
OUTPUT BUFFER  
AND POWER  
·
n
n
n
n
n
X2A REGISTER  
SERIAL  
INTERFACE  
DAC 7  
n
A/B  
MUX  
2
SYNC  
SDI  
DAC 7  
X1 REGISTER  
DOWN CONTROL  
SIGGND0  
REGISTER  
MUX  
X2B REGISTER  
n
n
M REGISTER  
C REGISTER  
n
SCLK  
SDO  
VREF1  
GROUP 1  
14  
n
n
n
OFFSET  
DAC 1  
OFS1  
REGISTER  
BUSY  
8
n
n
8
TO  
MUX 2's  
A/B SELECT  
REGISTER  
BUFFER  
RESET  
CLR  
OUTPUT BUFFER  
AND POWER  
DOWN CONTROL  
VOUT8  
n
X2A REGISTER  
DAC 0  
REGISTER  
n
A/B  
MUX  
2
DAC 0  
X1 REGISTER  
VOUT9  
MUX  
X2B REGISTER  
n
n
VOUT10  
VOUT11  
VOUT12  
VOUT13  
VOUT14  
VOUT15  
·
·
·
·
·
·
·
·
·
·
·
M REGISTER  
C REGISTER  
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
STATE  
MACHINE  
n
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
n
OUTPUT BUFFER  
AND POWER  
·
n
n
n
POWER-ON  
RESET  
n
n
X2A REGISTER  
n
DAC 7  
A/B  
MUX  
2
DAC 7  
X1 REGISTER  
DOWN CONTROL  
SIGGND1  
REGISTER  
MUX  
X2B REGISTER  
n
n
M REGISTER  
C REGISTER  
n
AD5372/  
AD5373  
VREF1 SUPPLIES  
GROUP 1 TO 3  
VOUT16  
TO  
VOUT31  
GROUP 2 TO GROUP 3  
ARE IDENTICAL TO GROUP 1  
5372-0001B  
SIGGND3  
SIGGND2  
Figure 1.  
AD5372/AD5373—Protected by U.S. Patent No. 5,969,657; other patents pending  
Rev. PrF  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective companies.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2006 Analog Devices, Inc. All rights reserved.  
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AD5373BSTZ 替代型号

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