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AD5378

更新时间: 2024-11-23 04:30:39
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亚德诺 - ADI /
页数 文件大小 规格书
28页 800K
描述
32-Channel, 14-Bit, Parallel and Serial Input, Bipolar Voltage Output DAC

AD5378 数据手册

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32-Channel, 14-Bit, Parallel and  
Serial Input, Bipolar Voltage Output DAC  
Preliminary Technical Data  
AD5378  
Interface options  
Parallel interface  
FEATURES  
32-channel DAC in 13 mm × 13 mm 108-lead CSPBGA  
Guaranteed monotonic to 14 bits  
Buffered voltage outputs  
Output voltage span of 3.5 V × VREF(+)  
Maximum output voltage span of 17.5 V  
DSP/microcontroller-compatible 3-wire serial interface  
2.5 V to 5.5 V JEDEC-compliant digital levels  
SDO daisy-chaining option  
Power-on reset  
Digital reset (RESET pin and soft reset function)  
System calibration function allowing user-programmable  
offset and gain  
Pseudo differential outputs relative to REFGND  
Clear function to user-defined REFGND (CLR pin)  
Simultaneous update of DAC outputs (LDAC pin)  
DAC increment/decrement mode  
APPLICATIONS  
Level setting in automatic test equipment (ATE)  
Variable optical attenuators (VOAs)  
Optical switches  
Industrial control systems  
Channel grouping and addressing features  
FUNCTIONAL BLOCK DIAGRAM  
V
V
V
AGND  
DGND  
LDAC  
V
V
1(+)  
V
1(–) REFGND A1  
CC  
DD  
SS  
BIAS  
REF  
REF  
VBIAS  
AD5378  
POWER-ON  
RESET  
CLR  
RESET  
DCEN/WR  
SYNC/CS  
REG0  
INPUT  
REG  
0–1  
DAC  
REG  
0–1  
14  
14  
14  
14  
14  
14  
VOUT 0  
VOUT 1  
DAC 0–1  
/
/
/
/
/
/
m REG0–1  
c REG0–1  
REG1  
14  
/
DB13  
SCLK/DB12  
DIN/DB11  
INPUT  
REG  
2
DAC  
REG  
2
14  
/
14  
/
DAC 2  
VOUT 2  
VOUT 3  
DB0  
m REG2  
c REG2  
14  
/
A7  
14  
/
A0  
VOUT 4  
VOUT 5  
INPUT  
REG  
5
DAC  
REG  
5
14  
14  
14  
14  
SER/PAR  
DIN  
DAC 5  
/
/
/
/
/
/
SCLK  
SDO  
m REG7  
c REG7  
14  
/
FIFOEN  
REFGND B1  
REFGND B2  
REFGND C1  
REFGND C2  
REFGND D1  
REFGND D2  
INPUT  
REG  
6–7  
DAC  
REG  
6–7  
14  
/
14  
/
14  
14  
VOUT 6  
DAC 6–7  
VOUT 7  
VOUT 8  
m REG8–9  
c REG8–9  
14  
/
×4  
VOUT 31  
BUSY  
V
2(+)  
V
2(–) REFGND A2  
REF  
REF  
Figure 1.  
Protected by U.S. Patent No. 5,969,657 and 6,823,416; other patents pending.  
Rev. PrA  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2005 Analog Devices, Inc. All rights reserved.  

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