Datasheet > A43L1616G-7UF

A43L1616G-7UF

更新时间： 2024-02-19 05:55:46

品牌	Logo	应用领域
联笙电子 - AMICC		动态存储器
页数	文件大小	规格书
46页	549K
描述
DRAM

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技术参数
数据手册

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A43L1616G-7UF 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.75
Base Number Matches：	1

A43L1616G-7UF 数据手册

A43L1616

Mode Register Filed Table to Program Modes

Address

A10/AP

Function

RFU

W.B.L

CAS Latency

Burst Length

(Note 1)

(Note 2)

Test Mode

Type

CAS Latency

A6 A5 A4 Latency

Reserved

Burst Type

Burst Length

A8 A7

Type

A2 A1 A0

BT=0

BT=1

Reserved

Mode Register Set

Sequential

Interleave

Vendor

Use

Only

Reserved

512(Full)

Reserved

Write Burst Length

Length

Burst

Single Bit

(Note 3)

Power Up Sequence

1. Apply power and start clock, Attempt to maintain CKE = “H”, DQM = “H” and the other pins are NOP condition at inputs.

2. Maintain stable power, stable clock and NOP input condition for a minimum of 200μs.

3. Issue precharge commands for all banks of the devices.

4. Issue 2 or more auto-refresh commands.

5. Issue a mode register set command to initialize the mode register.

cf.) Sequence of 4 & 5 may be changed.

The device is now ready for normal operation.

Note : 1. RFU(Reserved for Future Use) should stay “0” during MRS cycle.

2. If A9 is high during MRS cycle, “Burst Read Single Bit Write” function will be enabled.

3. The full column burst (512bit) is available only at Sequential mode of burst type.

PRELIMINARY (February, 2008, Version 0.3)

AMIC Technology, Corp.

1...7 8 91011 12 13...46

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