Datasheet > 9ZXL0831AKLF

9ZXL0831AKLF

更新时间： 2022-02-26 11:26:50

品牌	Logo	应用领域
艾迪悌 - IDT		输出元件
页数	文件大小	规格书
18页	347K
描述
8-OUTPUT

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9ZXL0831AKLF 数据手册

9ZXL0831

8-OUTPUT DB800ZL

Pin Descriptions (cont.)

PIN #

PIN NAME

TYPE

DESCRIPTION

32 DIF_5

33 DIF_5#

34 VDD

35 DIF_6

36 DIF_6#

OUT 0.7V differential true clock output

OUT 0.7V differential Complementary clock output

PWR Power supply, nominal 3.3V

OUT 0.7V differential true clock output

OUT 0.7V differential Complementary clock output

Active low input for enabling DIF pair 6. This pin has an internal pull-down.

1 =disable outputs, 0 = enable outputs

37 vOE6#

38 VDD

PWR Power supply, nominal 3.3V

39 DIF_7

40 DIF_7#

OUT 0.7V differential true clock output

OUT 0.7V differential Complementary clock output

Active low input for enabling DIF pair 7. This pin has an internal pull-down.

1 =disable outputs, 0 = enable outputs

41 vOE7#

42 VDD

43 NC

PWR Power supply, nominal 3.3V

N/A No Connection.

44 VDDA

45 NC

PWR 3.3V power for the PLL core.

N/A No Connection.

46 NC

N/A No Connection.

3.3V Input to select operating frequency.

See Functionality Table for Definition

47 100M_133M#

Trilevel input to select High BW, Bypass or Low BW mode.

See PLL Operating Mode Table for Details.

PWR Ground

48 HIBW_BYPM_LOBW#

49 GND

IDT® 8-OUTPUT DB800ZL

9ZXL0831

REV E 081616

1 2 345 6 7...18

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