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9ZXL0832EKILFT PDF预览

9ZXL0832EKILFT

更新时间: 2022-02-26 10:34:30
品牌 Logo 应用领域
艾迪悌 - IDT PC
页数 文件大小 规格书
18页 274K
描述
8-Output DB800ZL Derivative PCIe Gen1–4 and UPI

9ZXL0832EKILFT 数据手册

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8-Output DB800ZL Derivative for  
PCIe Gen14 and UPI with Write  
Lock  
9ZXL0832E / 9ZXL0852E  
Datasheet  
Description  
Features  
SMBus write lock feature; increases system security  
The 9ZXL0832E / 9ZXL0852E are second-generation, enhanced  
performance DB800ZL differential buffers. The parts are  
pin-compatible to the 9ZXL0831A and 9ZXL0851A while offering a  
much improved phase jitter performance. A fixed external feedback  
maintains low drift for critical QPI/UPI applications. The 9ZXL0832E  
and 9ZXL0852E have an SMBus Write Lockout pin for increased  
device and system security.  
LP-HCSL outputs; eliminate 16 resistors, save 27mm2 of area  
(0832E)  
LP-HCSL outputs with 85Zout; eliminate 32 resistors, save  
64mm2 of area (0852E)  
8 OE# pins; hardware control of each output  
Selectable PLL BW; minimizes jitter peaking in cascaded PLL  
topologies  
PCIe Clocking Architectures  
Supported  
Common Clocked (CC)  
Hardware/SMBus control of PLL bandwidth and bypass; change  
mode without power cycle  
Spread spectrum compatible; tracks spreading input clock for EMI  
Independent Reference (IR) with and without spread spectrum  
reduction  
100MHz & 133.33MHz PLL Mode; UPI and legacy QPI support  
6 × 6 mm 48-VFQFPN package; small board footprint  
Typical Application  
Servers  
Storage  
Key Specifications  
Cycle-to-cycle jitter < 50ps  
Networking  
SSDs  
Output-to-output skew < 50ps  
Input-to-output delay: Fixed at 0ps  
Input-to-output delay variation < 50ps  
Phase jitter: PCIe Gen4 < 0.5ps rms  
Phase jitter: QPI/UPI > = 9.6GB/s < 0.2ps rms  
Phase jitter: IF-UPI < 1.0ps rms  
Output Features  
8 Low-Power (LP) HCSL output pairs (0832E)  
8 Low-Power (LP) HCSL output pairs with 85Zout (0852E)  
Block Diagram  
VDDR  
VDDA  
VDD x7  
FBOUT_NC#  
FBOUT_NC  
PLL  
DIFIN#  
DIFIN  
DIF7#  
DIF7  
^100M_133M#  
vSMB_WRTLOCK  
SMBCLK  
8 outputs  
SMBus  
Engine Configuration  
Factory  
SMBDAT  
DIF0#  
DIF0  
^vHIBW_BYPM-LOBW#  
^CKPWRGD_PD#  
vOE[7:0]#  
Control Logic  
Resistors are integrated on 9ZXL085x devices and  
external on 9ZXL083x devices  
GNDR  
EPAD/GND  
©2018 Integrated Device Technology, Inc  
1
August 14, 2018  

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