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9ZXL0632EKILF PDF预览

9ZXL0632EKILF

更新时间: 2022-02-26 10:53:48
品牌 Logo 应用领域
艾迪悌 - IDT PC
页数 文件大小 规格书
20页 302K
描述
6-Output DB800ZL Derivat ive for PCIe Gen1–4 and UPI

9ZXL0632EKILF 数据手册

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9ZXL0632E / 9ZXL0652E Datasheet  
Pin Assignments  
40 39 38 37 36 35 34 33 32 31  
vSMB_WRTLOCK  
1
2
3
4
5
6
7
8
9
30 NC  
^HIBW_BYPM_LOBW#  
^CKPWRGD_PD#  
GND  
29 VDD  
28 vOE3#  
27 DIF3#  
26 DIF3  
25 VDD  
24 DIF2#  
23 DIF2  
22 vOE2#  
21 VDD  
9ZXL0632  
9ZXL0652  
pin 41 is EPAD,  
connect to GND  
VDDR  
DIF_IN  
DIF_IN#  
SMBDAT  
SMBCLK  
FBOUT_NC# 10  
11 12 13 14 15 16 17 18 19 20  
5 x 5 mm, 0.40mm pitch 40-QFN  
^ prefix indicates internal pull-up resistor  
v prefix indicates Internal pull-down resistor  
Pow er Management Table  
SMBus  
EN bit  
CKPWRGD_PD#  
DIF_IN  
OE[x]#  
DIF[x]  
PLL State (if not in Bypass Mode)  
0
1
X
X
0
0
1
1
X
0
1
0
1
Low/Low  
Low/Low  
Low/Low  
Running  
Low/Low  
OFF  
ON  
ON  
ON  
ON  
Running  
SMBus Address Table  
Address  
+ Read/Write bit  
1101100  
X
PLL Operating Mode Table  
HiBW_BypM_LoBW#  
Mode  
Low  
Mid  
PLL Low BW  
Bypass  
High  
PLL High BW  
Note: PLL is OFF in Bypass Mode.  
©2018 Integrated Device Technology, Inc.  
3
August 14, 2018  

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