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97SD3240RPMK PDF预览

97SD3240RPMK

更新时间: 2024-01-19 01:23:10
品牌 Logo 应用领域
麦斯威 - MAXWELL 动态存储器
页数 文件大小 规格书
39页 741K
描述
Synchronous DRAM, 32MX40, 6ns, CMOS, STACK, QFP-132

97SD3240RPMK 技术参数

生命周期:Obsolete包装说明:GQFF, QFL132,1.35SQ,25
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.36风险等级:5.7
Is Samacsys:N访问模式:FOUR BANK PAGE BURST
最长访问时间:6 ns其他特性:AUTO/SELF REFRESH
最大时钟频率 (fCLK):133.33 MHzI/O 类型:COMMON
交错的突发长度:1,2,4,8JESD-30 代码:S-XQFP-F132
长度:34.29 mm内存密度:1342177280 bit
内存集成电路类型:SYNCHRONOUS DRAM内存宽度:40
功能数量:1端口数量:1
端子数量:132字数:33554432 words
字数代码:32000000工作模式:SYNCHRONOUS
最高工作温度:125 °C最低工作温度:-55 °C
组织:32MX40封装主体材料:UNSPECIFIED
封装代码:GQFF封装等效代码:QFL132,1.35SQ,25
封装形状:SQUARE封装形式:FLATPACK, GUARD RING
认证状态:Not Qualified刷新周期:8192
反向引出线:NO自我刷新:YES
连续突发长度:1,2,4,8最大待机电流:0.15 A
最小待机电流:3 V最大压摆率:0.575 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:FLAT端子节距:0.635 mm
端子位置:QUAD总剂量:100k Rad(Si) V
宽度:34.29 mmBase Number Matches:1

97SD3240RPMK 数据手册

 浏览型号97SD3240RPMK的Datasheet PDF文件第5页浏览型号97SD3240RPMK的Datasheet PDF文件第6页浏览型号97SD3240RPMK的Datasheet PDF文件第7页浏览型号97SD3240RPMK的Datasheet PDF文件第9页浏览型号97SD3240RPMK的Datasheet PDF文件第10页浏览型号97SD3240RPMK的Datasheet PDF文件第11页 
97SD3240  
1.25Gb (8-Meg X 40-Bit X 4-Banks) SDRAM  
Command Operation  
Command Truth Table  
The SDRAM recognizes the following commands specified by the CS, RAS, CAS, WE and address pins:  
BA0/  
BA1  
A0 TO  
A12  
COMMAND  
SYMBOL  
N-1  
N
CS  
RAS  
CAS  
WE  
A10  
Ignore command  
No Operation  
DESL  
NOP  
H
H
H
x
x
x
H
L
L
x
x
H
L
x
x
x
x
x
L
x
x
H
H
H
H
Column Address and  
Read command  
READ  
V
V
Read with auto-pre-  
charge  
READ A  
WRIT  
H
H
H
H
H
x
x
x
x
x
L
L
L
L
L
H
H
H
L
L
L
L
H
H
H
L
L
H
L
V
V
V
V
V
H
L
V
V
V
V
x
Column Address and  
write command  
Write with auto-pre-  
charge  
WRIT A  
ACTV  
PRE  
H
V
L
Row address strobe  
and bank active  
Precharge select  
bank  
L
Precharge all banks  
Refresh  
PALL  
H
H
x
L
L
L
L
H
L
L
x
x
H
x
x
x
REF/  
SELF  
L
H
Mode register set  
MRS  
H
x
L
L
L
L
V
V
V
Note: H: V L: V x V or V V: Valid address input  
IH  
IL  
IH  
IL  
Ignore command (DESL): When this command is set (CS = High), the SDRAM ignores command input at  
the clock. However, the internal status is held.  
No Operation (NOP): This command is not an execution command. However, the internal operations  
continue.  
Column address strobe and read command (READ): This command starts a read operation. In addition,  
the start address of a burst read is determined by the column address (AY0 to AY9) and the bank select  
address (BS). After the read operation, the output buffer becomes High-Z.  
Read with auto-precharge (READ A): This command automatically performs a precharge operation after a  
burst read with a burst length of 1, 2, 4, or 8.  
02.04.05 Rev 3  
All data sheets are subject to change without notice  
8
©2005 Maxwell Technologies  
All rights reserved.  

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