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935325982557 PDF预览

935325982557

更新时间: 2024-11-08 15:46:31
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
166页 3181K
描述
Multifunction Peripheral

935325982557 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:unknown风险等级:5.71
Base Number Matches:1

935325982557 数据手册

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Document Number: IMX6DQPAEC  
Rev. 3, 11/2018  
NXP Semiconductors  
Data Sheet: Technical Data  
MCIMX6QPxAxxxxA  
MCIMX6QPxAxxxxB  
MCIMX6DPxAxxxxA  
MCIMX6DPxAxxxxB  
i.MX6DualPlus/6QuadPlus  
Automotive Applications  
Processors  
Package Information  
FCPBGA Package  
21 x 21 mm, 0.8 mm pitch  
Ordering Information  
See Table 1  
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
1.1 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 2  
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
1.3 Signal Naming Convention . . . . . . . . . . . . . . . . . . . 7  
Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
2.1 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
3.1 Special Signal Considerations. . . . . . . . . . . . . . . . 19  
3.2 Recommended Connections for Unused Analog  
Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
1 Introduction  
The i.MX 6DualPlus/6QuadPlus processors offer the  
highest levels of graphics processing performance in the  
i.MX 6 series family and are ideally suited for graphics  
intensive applications such as reconfigurable instrument  
clusters and high performance infotainment systems.  
2
3
4
Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 20  
4.1 Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . . 20  
4.2 Power Supplies Requirements and Restrictions . . 33  
4.3 Integrated LDO Voltage Regulator Parameters . . 34  
4.4 PLL Electrical Characteristics . . . . . . . . . . . . . . . . 36  
4.5 On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . . 37  
4.6 I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 38  
4.7 I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 44  
4.8 Output Buffer Impedance Parameters. . . . . . . . . . 49  
4.9 System Modules Timing . . . . . . . . . . . . . . . . . . . . 53  
4.10 Multi-Mode DDR Controller (MMDC). . . . . . . . . . . 64  
4.11 General-Purpose Media Interface (GPMI) Timing. 64  
4.12 External Peripheral Interface Parameters . . . . . . . 73  
Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . 138  
5.1 Boot Mode Configuration Pins. . . . . . . . . . . . . . . 138  
5.2 Boot Devices Interfaces Allocation . . . . . . . . . . . 139  
Package Information and Contact Assignments. . . . . . 141  
6.1 Signal Naming Convention . . . . . . . . . . . . . . . . . 141  
6.2 21 x 21 mm Package Information . . . . . . . . . . . . 141  
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164  
The i.MX 6DualPlus/6QuadPlus processors feature  
advanced implementation of the quad  
®
®
Arm Cortex -A9 core, which operates at speeds up to  
1 GHz. They include updated versions of the 2D and 3D  
graphics processors, 1080p video processing, and  
integrated power management. Each processor provides  
a 64-bit DDR3/DDR3L/LPDDR2 memory interface and  
a number of other interfaces for connecting peripherals,  
®
such as WLAN, Bluetooth , GPS, hard drive, displays,  
5
6
7
and camera sensors.  
The i.MX 6DualPlus/6QuadPlus processors are  
specifically useful for applications such as the  
following:  
Reconfigurable instrument cluster high  
performance infotainment  
NXP Reserves the right to change the production detail specifications as may be  
required to permit improvements in the design of its products.  

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