Document Number: MC33903_4_5
Rev. 14.0, 2/2018
NXP Semiconductors
Data Sheet: Advance Information
SBC Gen2 with CAN high speed and
LIN interface
33903/
33903/4/5
The 33903/4/5 is the second generation family of the System Basis Chip (SBC).
It combines several features and enhances present module designs. The device
works as an advanced power management unit for the MCU with additional
integrated circuits such as sensors and CAN transceivers. It has a built-in
enhanced high-speed CAN interface (ISO11898-2 and -5) with local and bus
failure diagnostics, protection, and fail-safe operation modes. The SBC may
include zero, one or two LIN 2.1 interfaces with LIN output pin switches. It
includes up to four wake-up input pins that can also be configured as output
drivers for flexibility. This device is powered by SMARTMOS technology.
SYSTEM BASIS CHIP
This device implements multiple Low-power (LP) modes, with very low-current
consumption. In addition, the device is part of a family concept where pin
compatibility adds versatility to module design.
EK Suffix (Pb-free)
98ASA10506D
54-PIN SOIC
EK Suffix (Pb-free)
98ASA10556D
32-PIN SOIC
The 33903/4/5 also implements an innovative and advanced fail-safe state
machine and concept solution.
Applications
• Aircraft and marine systems
• Automotive and robotic systems
• Farm equipment
Features
• Voltage regulator for MCU, 5.0 or 3.3 V, part number selectable, with
possibility of usage external PNP to extend current capability and share power
dissipation
• Voltage, current, and temperature protection
• Industrial actuator controls
• Extremely low quiescent current in LP modes
• Lamp and inductive load controls
• DC motor control applications requiring diagnostics
• Applications where high-side switch control is
required
• Fully-protected embedded 5.0 V regulator for the CAN driver
• Multiple undervoltage detections to address various MCU specifications and
system operation modes (i.e. cranking)
• Auxiliary 5.0 or 3.3 V SPI configurable regulator, for additional ICs, with
overcurrent detection and undervoltage protection
• MUX output pin for device internal analog signal monitoring and power supply
monitoring
• Advanced SPI, MCU, ECU power supply, and critical pins diagnostics and
monitoring.
• Multiple wake-up sources in LP modes: CAN or LIN bus, I/O transition,
automatic timer, SPI message, and VDD overcurrent detection.
• ISO11898-5 high-speed CAN interface compatibility for baud rates of 40 kb/s
to 1.0 Mb/s
• Scalable product family of devices ranging from 0 to 2 LINs which are
compatible to J2602-2 and LIN 2.1
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© NXP B.V. 2018.