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935336933699

更新时间： 2024-09-21 21:05:39
品牌 Logo 应用领域
恩智浦 - NXP 外围集成电路
页数 文件大小 规格书
60页 948K
描述
RISC Microprocessor

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935336933699 技术参数

生命周期：Active包装说明：,
Reach Compliance Code：unknown风险等级：5.76
uPs/uCs/外围集成电路类型：MICROPROCESSOR, RISCBase Number Matches：1

935336933699 数据手册

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Document Number S32R372  
Rev. 4, 08/2018  
NXP Semiconductors  
Data Sheet: Technical Data  
S32R372  
S32R372 Data Sheet  
Features  
• Security  
– Cryptographic Security Engine (CSE2)  
– Supports censorship and life-cycle management  
• Dual issue computation cores: Power Architecture®  
e200z7 32-bit CPU  
• Timers  
• 1.3 MB on-chip code flash memory (FMC flash  
memory) with ECC  
– Two Periodic Interval Timers (PIT) with 32-bit  
counter resolution  
• 1 MB on-chip SRAM with ECC  
– Two System Timer Module (STM)  
– Two Software Watchdog Timers (SWT)  
– One eTimer module with 6 channels each  
– One FlexPWM module for 12 PWM signals  
• RADAR processing  
– Signal Processing Toolbox (SPT) for RADAR signal  
processing acceleration  
– Cross Triggering Engine (CTE) for precise timing  
generation and triggering  
– MIPICSI2 interface to connect external RADAR RX  
ADCs  
• Communication interfaces  
– Two Serial Peripheral interface (SPI) modules  
– One LINFlexD module  
– Two inter-IC communication interface (I2C)  
modules  
– Two FlexCAN modules supporting CAN FD with  
configurable buffers  
• Memory protection  
– Each core memory protection unit provides 24  
entries  
– Data and instruction bus system memory protection  
unit (SMPU) with 16 region descriptors each  
– Register protection  
• Debug functionality  
– 4-pin JTAG interface and Nexus/Aurora interface  
for serial high-speed tracing  
– e200z7 core: Nexus development interface (NDI)  
per IEEE-ISTO 5001-2012 Class 3+  
• Clock generation  
– 40 MHz external crystal (XOSC)  
– 16 MHz Internal oscillator (IRCOSC)  
– Dual system PLL with one frequency modulated  
phase-locked loop (FMPLL)  
• Two analog-to-digital converters (SAR ADC)  
– Each ADC supports up to 16 input channels  
– Cross Trigger Unit (CTU)  
– Low-jitter PLL  
• On-chip voltage DC/DC regulator for core supply  
generation (VREG)  
• Functional safety  
– Enables ASIL-B applications  
– Fault Collection and Control Unit (FCCU) for fault  
collection and fault handling  
• Two Temperature Sensors (TSENS)  
– Memory Error Management Unit (MEMU) for  
memory error management  
– Safe eDMA controller  
– Self-Test Control Unit (STCU2)  
– Error Injection Module (EIM)  
– On-chip voltage monitoring  
– Clock Monitor Unit (CMU)  
NXP reserves the right to change the production detail specifications as may be  
required to permit improvements in the design of its products.  
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