Freescale Semiconductor
Data Sheet: Advance Information
Document Number: MPC5646C
Rev.6, 02/2014
MPC5646C
MAPBGA–225
QFN12
##_mm_x_##mm
(28 mm x 28 mm)
208-pin LQFP
256 MAPBGA
15 mm x 15 mm
(17 mm x 17 mm)
SOT-343R
PKG-TBD
## mm x ## mm
MPC5646C
Microcontroller Data Sheet
##_mm_x_##mm
176-pin LQFP
TBD
(24 mm x 24 mm)
On-chip modules available within the family
include the following features:
e200z4d, e200z0h, or both.
•
Crossbar switch architecture for concurrent
access to peripherals, flash memory, and
SRAM from multiple bus masters
•
e200z4d dual issue, 32-bit core Power
Architecture compliant CPU
•
•
32 channel eDMA controller with
DMAMUX
— Up to 120 MHz
— 4 KB, 2/4-Way Set Associative
Instruction Cache
Timer supports input/output channels
providing 16-bit input capture, output
compare, and PWM functions (eMIOS)
— Variable length encoding (VLE)
— Embedded floating-point (FPU) unit
— Supports Nexus3+
•
•
2 analog-to-digital converters (ADC): one
10-bit and one 12-bit
•
•
e200z0h single issue, 32-bit core Power
Architecture compliant CPU
Cross Trigger Unit (CTU) to enable
synchronization of ADC conversions with a
timer event from the eMIOS or from the PIT
— Up to 80 MHz
— Variable length encoding (VLE)
— Supports Nexus3+
•
•
•
Up to 8 serial peripheral interface (DSPI)
modules
Up to 10 serial communication interface
(LINFlex) modules
Up to 3 MB on-chip flash memory: flash
page buffers to improve access time
Up to 6 full CAN (FlexCAN) modules with
64 MBs each
•
•
Up to 256 KB on-chip SRAM
64 KB on-chip data flash memory to
support EEPROM emulation
•
•
CAN Sampler to catch ID of CAN message
2
1 inter IC communication interface (I C)
•
•
•
Up to 16 semaphores across all slave ports
User selectable MBIST
module
•
•
•
Up to 177 (LQFP) or 199 (BGA)
configurable general purpose I/O pins
Low-power modes supported: STOP,
HALT, STANDBY
1 System Timer Module (STM) with four
32-bit compare channels
•
•
16 region Memory Protection Unit (MPU)
Dual-core Interrupt Controller (INTC).
Interrupt sources can be routed to
Up to 8 periodic interrupt timers (PIT) with
32-bit counter resolution
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
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