Datasheet > 935306831118

935306831118

更新时间： 2024-09-17 19:55:35

品牌	Logo	应用领域
恩智浦 - NXP		接口集成电路
页数	文件大小	规格书
31页	1015K
描述
Interface Circuit

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技术参数
数据手册

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935306831118 技术参数

生命周期：	Active	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.61
接口集成电路类型：	INTERFACE CIRCUIT	Base Number Matches：	1

935306831118 数据手册

PCA9847

8-channel ultra-low voltage, Fm+ I²C-bus multiplexer with

reset

Rev. 1 — 9 November 2015

Product data sheet

1. General description

The PCA9847 is an ultra-low voltage, octal bidirectional translating multiplexer controlled

via the I²C-bus. The SCL/SDA upstream pair fans out to eight downstream pairs, or

channels. Any single SCx/SDx channel can be selected, determined by the

programmable control register. This feature allows multiple devices with the same I²C-bus

address to reside on the same bus. The multiplexer device can also separate a heavily

loaded I²C-bus into separate bus segments, eliminating the need for a bus buffer.

An active LOW reset input allows the PCA9847 to recover from a situation where one of

the downstream I²C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets

the I²C-bus state machine and deselects all the channels, as does the internal

Power-On Reset (POR) function.

The pass gates of the multiplexers are constructed such that the V_DD1pin is used to limit

the maximum high voltage which is passed by the PCA9847. This allows the use of

different bus voltages on each channel, so that 0.8 V, 1.8 V, 2.5 V or 3.3 V parts can

communicate without any additional protection. External pull-up resistors pull the bus up

to the desired voltage level for each channel. All I/O pins are 3.6 V tolerant.

2. Features and benefits

 Ultra-low voltage operation, down to 0.8 V to interface with next-generation CPUs

 1-of-8 bidirectional translating multiplexer

 Fm+ I²C-bus interface logic; compatible with SMBus standards

 Active LOW reset input

 2 address pins allowing up to 16 devices on the I²C-bus

 Channel selection via I²C-bus

 Power-up with all multiplexer channels deselected

 Low R_onswitches

 Allows voltage level translation between 0.8 V, 1.8 V, 2.5 V and 3.3 V buses

 Reset via I²C-bus software command

 I²C Device ID function

 No glitch on power-up

 Supports hot insertion since all channels are de-selected at power-on

 Low standby current

 3.6 V tolerant inputs

 0 Hz to 1 MHz clock frequency

 ESD protection exceeds 6000 V HBM per JESD22-A114 and 1000 V CDM per

JESD22-C101

12 3 4 5 6 7...31

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