Datasheet > 8V31012NLGI

8V31012NLGI

更新时间： 2022-02-26 12:22:58

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
17页	455K
描述
1-to-12, Differential HCSL Fanout Buffer

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数据手册

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8V31012NLGI 数据手册

1-to-12, Differential HCSL Fanout Buffer

8V31012

DATA SHEET

General Description

Features

The 8V31012 is a 1-to-12 Differential HCSL Fanout Buffer. The

8V31012 is designed to translate any differential signal levels to

differential HCSL output levels. An external reference resistor is

used to set the value of the current supplied to an external

load/termination resistor. The load resistor value is chosen to equal

the value of the characteristic line impedance of 50. The 8V31012

is characterized at an operating supply voltage of 3.3V.

• Twelve differential HCSL outputs

• Translates any differential input signal (LVPECL, LVHSTL, LVDS,

HCSL) to HCSL levels without external bias networks

• Maximum output frequency: 250MHz

• Output skew: 265ps (typical)

• V_OH:850mV (maximum)

• Full 3.3V supply voltage

• Available in lead-free (RoHS 6) package

• -40°C to 85°C ambient operating temperature

The differential HCSL outputs, accurate crossover voltage and duty

cycle make the 8V31012 ideal for interfacing to PCI Express and

FBDIMM applications.

Block Diagram

Pin Assignment

CLK

nCLK

48 47 46 45 44 43 42 41 40 39 38 37

nQ6

V_DD

nQ9

nQ0

V_DD

nQ0

nQ1

nQ7

GND

nQ8

nQ1

GND

nQ2

nQ8

8V31012

V_DD

nQ7

nQ2

V_DD

nQ9

nQ3

V_DD

nQ6

Q10

nQ10

nQ3

V_DD

nQ4

13 14 15 16 17 18 19 20 21 22 23 24

Q11

nQ11

nQ5

IREF

48-pin, 7mm x 7mm VFQFN Package

8V31012 REVISION 1 10/21/15

12 3 4 5 6 7...17

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