Datasheet > 87972DYI-147T

87972DYI-147T

更新时间： 2024-11-05 14:48:59

品牌	Logo	应用领域
艾迪悌 - IDT		时钟外围集成电路晶体
页数	文件大小	规格书
14页	302K
描述
Processor Specific Clock Generator, 150MHz, PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQFP-52

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87972DYI-147T 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	10 X 10 MM, 1.40 MM HEIGHT, MS-026, LQFP-52	针数：	52
Reach Compliance Code：	not_compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.55
JESD-30 代码：	S-PQFP-G52	JESD-609代码：	e0
长度：	10 mm	湿度敏感等级：	3
端子数量：	52	最高工作温度：	85 °C
最低工作温度：	-40 °C	最大输出时钟频率：	150 MHz
封装主体材料：	PLASTIC/EPOXY	封装代码：	LQFP
封装等效代码：	QFP52,.47SQ	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE	峰值回流温度（摄氏度）：	240
电源：	3.3 V	主时钟/晶体标称频率：	150 MHz
认证状态：	Not Qualified	座面最大高度：	1.6 mm
子类别：	Clock Generators	最大压摆率：	250 mA
最大供电电压：	3.465 V	最小供电电压：	3.135 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn85Pb15)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	20	宽度：	10 mm
uPs/uCs/外围集成电路类型：	CLOCK GENERATOR, PROCESSOR SPECIFIC	Base Number Matches：	1

87972DYI-147T 数据手册

ICS87972I-147

LOW SKEW, 1-TO-12

LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER

Integrated

Circuit

Systems, Inc.

GENERAL DESCRIPTION

FEATURES

The ICS87972I-147 is a low skew, LVCMOS/LVTTL

• Fully integrated PLL

ICS

Clock Generator and a member of the HiPerClockS™

• 14 LVCMOS/LVTTL outputs; (12)clocks, (1)feedback, (1)sync

HiPerClockS™

family of High Performance Clock Solutions from

ICS.The ICS87972I-147 has three selectable inputs

and provides 14 LVCMOS/LVTTL outputs.

• Selectable crystal oscillator interface or LVCMOS/LVTTL

reference clock inputs

• CLK0, CLK1 can accept the following input levels:

The ICS87972I-147 is a highly flexible device. Using the crystal

oscillator input, it can be used to generate clocks for a system.

All of these clocks can be the same frequency or the device can

be configured to generate up to three different frequencies among

the three output banks. Using one of the single ended inputs, the

ICS87972I-147 can be used as a zero delay buffer/multiplier/

divider in clock distribution applications.

LVCMOS or LVTTL

• Output frequency range: 10MHz to 150MHz

• VCO range: 240MHz to 500MHz

• Output skew: 200ps (maximum)

• Cycle-to-cycle jitter, (all banks ÷4): 55ps (maximum)

• Full 3.3V operating supply

The three output banks and feedback output each have their

own output dividers which allows the device to generate a

multitude of different bank frequency ratios and output-to-input

frequency ratios. In addition, 2 outputs in Bank C (QC2, QC3)

can be selected to be inverting or non-inverting. The output

frequency range is 10MHz to 150MHz. Input frequency range is

6MHz to 150MHz.

• -40°C to 85°C ambient operating temperature

• Pin compatible with MPC972

• Compatible with PowerPC™andPentium™ Microprocessors

The ICS87972I-147 also has a QSYNC output which can be

used or system synchronization purposes. It monitors Bank A

and Bank C outputs and goes low one period of the faster clock

prior to coincident rising edges of Bank A and Bank C clocks.

QSYNC then goes high again when the coincident rising edges

of Bank A and Bank C occur. This feature is used primarily in

applications where Bank A and Bank C are running at different

frequencies, and is particularly useful when they are running at

non-integer multiples of one another.

PIN ASSIGNMENT

39 38 37 36 35 34 33 32 31 30 29 28 27

FSEL_B1

FSEL_B0

FSEL_A1

FSEL_A0

QA3

FSEL_FB1

QSYNC

GNDO

QC0

Example Applications:

1. System Clock generator: Use a 16.66 MHz Crystal to

generate eight 33.33MHz copies for PCI and four 100MHz

copies for the CPU or PCI-X.

V^DDO

QC1

QA2

FSEL_C0

FSEL_C1

QC2

ICS87972I-147

2. Line Card Multiplier: Multiply 19.44MHz from a back plane

to 77.76MHz for the line Card ASICs and Serdes.

GNDO

QA1

3. Zero Delay buffer for Synchronous memory: Fan out up

to twelve 100MHz copies from a memory controller ref-

erence clock to the memory chips on a memory module

with zero delay.

V^DDO

QA0

QC3

GNDO

VCO_SEL

GNDO

INV_CLK

9 10 11 12 13

52-Lead LQFP

10mm x 10mm x 1.4mm package body

Y package

TopView

87972DYI-147

www.icst.com/products/hiperclocks.html

REV. A FEBRUARY 24, 2009

12 3 4 5 6 7...14

中文翻译

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与87972DYI-147T相关器件

型号	品牌	获取价格	描述	数据表
87972DYILF	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
87972DYILFT	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
87972DYIT	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
87972I-147	IDT	获取价格	Low Skew, 1-to-12 LVCMOS/LVTTL Clock Multiplier/Zero Delay Buffer
87973	IDT	获取价格	Low Skew, 1-to-12 LVCMOS / LVTTL Clock Mult iplier/Zero Delay Buffer
87973DYI	IDT	获取价格	PLL Based Clock Driver, 87973 Series, 13 True Output(s), 0 Inverted Output(s), CMOS, PQFP5
87973DYI-147	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
87973DYI-147LF	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
87973DYI-147LFT	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
87973DYI-147T	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER

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