Datasheet > 87973DYI

87973DYI

更新时间： 2024-11-05 21:14:27

品牌	Logo	应用领域
艾迪悌 - IDT		驱动逻辑集成电路
页数	文件大小	规格书
17页	253K
描述
PLL Based Clock Driver, 87973 Series, 13 True Output(s), 0 Inverted Output(s), CMOS, PQFP52, 10 X 10 MM, 1.40 MM HEIGHT, MS-026BCC, LQFP-52

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87973DYI 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	10 X 10 MM, 1.40 MM HEIGHT, MS-026BCC, LQFP-52	针数：	52
Reach Compliance Code：	not_compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.33
系列：	87973	输入调节：	DIFFERENTIAL MUX
JESD-30 代码：	S-PQFP-G52	JESD-609代码：	e0
长度：	10 mm	逻辑集成电路类型：	PLL BASED CLOCK DRIVER
最大I（ol）：	0.02 A	湿度敏感等级：	3
功能数量：	1	反相输出次数：
端子数量：	52	实输出次数：	13
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	LQFP	封装等效代码：	QFP52,.47SQ
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE
峰值回流温度（摄氏度）：	240	电源：	3.3 V
认证状态：	Not Qualified	Same Edge Skew-Max（tskwd）：	0.55 ns
座面最大高度：	1.6 mm	子类别：	Clock Drivers
最大供电电压 (Vsup)：	3.465 V	最小供电电压 (Vsup)：	3.135 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn85Pb15)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	20	宽度：	10 mm
最小 fmax：	125 MHz	Base Number Matches：	1

87973DYI 数据手册

ICS87973I

LOW SKEW, 1-TO-12

LVCMOS / LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER

GENERAL DESCRIPTION

FEATURES

The ICS87973I is a LVCMOS/LVTTL clock generator .

The ICS87973I has three selectable inputs and provides

fourteen LVCMOS/LVTTL outputs.

• Fully integrated PLL

• Fourteen LVCMOS/LVTTL outputs; twelve clock outputs,

one feedback, one sync

The ICS87973I is a highly flexible device. The three selectable

inputs (1 differential and 2 single ended inputs) are often used

in systems requiring redundant clock sources. Up to three

different output frequencies can be generated among the

three output banks.

• Selectable LVCMOS/LVTTL or differential CLK, nCLK inputs

• CLK0, CLK1 can accept the following input levels:

LVCMOS or LVTTL

• CLK, nCLK pair can accept the following differential

input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL

The three output banks and feedback output each have their

own output dividers which allows the device to generate a

multitude of different bank frequency ratios and output-to-input

frequency ratios. In addition, 2 outputs in Bank C (QC2, QC3)

can be selected to be inverting or non-inverting. The output

frequency range is 8.33MHz to125MHz. The input frequency

range is 5MHz to 120MHz.

• Output frequency range: 8.33MHz to 125MHz

• VCO range: 200MHz to 480MHz

• Output skew: 550ps (maximum)

• Cycle-to-cycle jitter: 100ps (typical)

• Full 3.3V supply voltage

The ICS87973I also has a QSYNC output which can by used

for system synchronization purposes. It monitors Bank A and

Bank C outputs and goes low one period prior to coincident

rising edges of Bank A and Bank C clocks. QSYNC then goes

high again when the coincident rising edges of Bank A and

Bank C occur. This feature is used primarily in applications where

Bank A and Bank C are running at different frequencies, and is

particularly useful when they are running at non-integer

multiples of one another.

• -40°C to 85°C ambient operating temperature

• Available in both standard and lead-free RoHS compliant

packages

• Compatible with PowerPC™ and Pentium™ Microprocessors

PIN ASSIGNMENT

Example Applications:

39 38 37 36 35 34 33 32 31 30 29 28 27

1. System Clock generator: Use a 16.66MHz reference

clock to generate eight 33.33MHz copies for PCI and

four 100MHz copies for the CPU or PCI-X.

FSEL_B1

FSEL_B0

FSEL_A1

FSEL_A0

QA3

FSEL_FB1

QSYNC

GNDO

QC0

2. Line Card Multiplier: Multiply differential 62.5MHz from

a back plane to single-ended 125MHz for the line Card

ASICs and Gigabit Ethernet Serdes.

V^DDO

QC1

3. Zero Delay buffer for Synchronous memory: Fan out

up to twelve 100MHz copies from a memory controller

reference clock to the memory chips on a memory module

with zero delay.

QA2

FSEL_C0

FSEL_C1

QC2

ICS87973I

GNDO

QA1

V^DDO

QA0

QC3

GNDO

VCO_SEL

GNDO

INV_CLK

9 10 11 12 13

52-Lead LQFP

10mm x 10mm x 1.4mm package body

Y package

Top View

87973DYI

www.idt.com

REV. D AUGUST 11, 2010

12 3 4 5 6 7...17

中文翻译

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87973DYI 替代型号

型号	品牌	替代类型	描述	数据表
87973DYI-147	IDT	完全替代	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
ICS87973DYILF	IDT	功能相似	PLL Based Clock Driver, 13 True Output(s), 0 Inverted Output(s), PQFP52, 10 X 10 MM, 1.40

与87973DYI相关器件

型号	品牌	获取价格	描述	数据表
87973DYI-147	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
87973DYI-147LF	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
87973DYI-147LFT	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
87973DYI-147T	IDT	获取价格	LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
87973DYILF	IDT	获取价格	Low Skew, 1-to-12 LVCMOS / LVTTL Clock Mult iplier/Zero Delay Buffer
87973DYILFT	IDT	获取价格	Low Skew, 1-to-12 LVCMOS / LVTTL Clock Mult iplier/Zero Delay Buffer
87973DYIT	IDT	获取价格	PLL Based Clock Driver, 87973 Series, 13 True Output(s), 0 Inverted Output(s), CMOS, PQFP5
87973I-147	IDT	获取价格	Low Skew, 1-to-12 LVCMOS/ LVTTL Clock Multiplier/ Zero Delay Buffer
87973I-147_16	IDT	获取价格	Low Skew, 1-to-12 LVCMOS/ LVTTL Clock Multiplier/ Zero Delay Buffer
87974CYI	IDT	获取价格	PLL Based Clock Driver, 87974 Series, 15 True Output(s), 0 Inverted Output(s), PQFP52, 10

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